@@ -126,7 +126,11 @@ from the [datasheet](http://cds.linear.com/docs/en/datasheet/7001fb.pdf) I shoul
Here's what the board section looks like. The circuit doesn't require much. There's two 1uF capacitors: one which serves as the boost capacitor and one simply acts as a bypass between Vcc and ground. A resistor in series with the gate will let me limit in-rush current. Two 1nF capacitors are pictured at the output as a simulated capacitive load.
I tested the gate driving circuitry independently to verify that it was working as expected. Here it is taking the 2.5Vpp square wave from the AFG on my scope and boostin it up to 12Vpp (even with a 7V DC offset). The rise time for a 1nF load (with no series resistance) is about 12ns and is about 20ns for a 2nF load. I expect the gate of the MOSFET to be ~3nF so I should expect in the ballpark of 30ns rise time.