diff --git a/README.md b/README.md index f3e2e4417401f236f27f59119724211a58d5a4b3..e59d7733ac5238098297337675b5b6c28e702596 100644 --- a/README.md +++ b/README.md @@ -2,13 +2,7 @@ Message passing hardware for [squid works](https://gitlab.cba.mit.edu/squidworks/squidworks) machines. - + - - - -## Notes - -- router panel also needs 5mm between boards for overhanging rj connectors -- nice to have silkscreen notes for where the usb, and mother-rj are located -- if we go for 24v in on lower-level boards, put one here ? + + diff --git a/daughterboard-router-squidrev/daughterboard-router-squidrev.brd b/daughterboard-router-squidrev/daughterboard-router-squidrev.brd deleted file mode 100644 index fea9d8ee2b66c6a2f585723249243b78526cf29a..0000000000000000000000000000000000000000 --- a/daughterboard-router-squidrev/daughterboard-router-squidrev.brd +++ /dev/null @@ -1,2337 +0,0 @@ -<?xml version="1.0" encoding="utf-8"?> -<!DOCTYPE eagle SYSTEM "eagle.dtd"> -<eagle version="9.2.2"> -<drawing> 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Sollte ihre Platine -besondere Anforderungen haben, treffen Sie die erforderlichen -Einstellungen hier und speichern die Design Rules unter -einem neuen Namen ab.</description> -<description language="en"><b>EAGLE Design Rules</b> -<p> -The default Design Rules have been set to cover -a wide range of applications. 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y="-2.54" length="middle"/> -<pin name="TX-Z" x="-10.16" y="2.54" length="middle"/> -<pin name="CLOCKRX-A" x="-10.16" y="40.64" length="middle"/> -<pin name="CLOCKRX-B" x="-10.16" y="35.56" length="middle"/> -<pin name="CLOCKTX-Z" x="-10.16" y="30.48" length="middle"/> -<pin name="CLOCKTX-Y" x="-10.16" y="25.4" length="middle"/> -<pin name="RX-B" x="-10.16" y="7.62" length="middle"/> -<pin name="RX-A" x="-10.16" y="12.7" length="middle"/> -<wire x1="-5.08" y1="43.18" x2="-5.08" y2="-33.02" width="0.254" layer="94"/> -<wire x1="-5.08" y1="-33.02" x2="20.32" y2="-33.02" width="0.254" layer="94"/> -<wire x1="20.32" y1="-33.02" x2="20.32" y2="43.18" width="0.254" layer="94"/> -<wire x1="20.32" y1="43.18" x2="-5.08" y2="43.18" width="0.254" layer="94"/> -<text x="0" y="45.72" size="1.27" layer="95">>NAME</text> -<text x="0" y="-38.1" size="1.27" layer="95">>VALUE</text> -</symbol> -</symbols> -<devicesets> -<deviceset name="FIDUCIAL" prefix="J"> -<description>For use by pick and place machines to calibrate the vision/machine, 1mm -<p>By microbuilder.eu</p></description> -<gates> -<gate name="G$1" symbol="DOT" x="0" y="0"/> -</gates> -<devices> -<device name="" package="FIDUCIAL_1MM"> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="RCT" package="FIDUCIAL_RECT_1MM"> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="CBA-LOGO"> -<gates> -<gate name="G$1" symbol="CBALOGO" x="0" y="0"/> -</gates> -<devices> -<device name="" package="CBA-SILK-LOGO"> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="TOMBSTONE" prefix="MP"> -<gates> -<gate name="G$1" symbol="TOMBSTONE" x="0" y="0"/> -</gates> -<devices> -<device name="" package="TOMBSTONE"> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="ATK-BFPP" prefix="J"> -<gates> -<gate name="G$1" symbol="ATK-BFPP" x="0" y="0"/> -</gates> -<devices> -<device name="MINIPCIE-MOTHER" package="MINI-PCIE-ATK-MOTHER"> -<connects> -<connect gate="G$1" pin="+3V3" pad="15 16"/> -<connect gate="G$1" pin="+5V" pad="17 18"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="4"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="5"/> -<connect gate="G$1" pin="A2(PB08)" pad="6"/> -<connect gate="G$1" pin="A3(PB09)" pad="9"/> -<connect gate="G$1" pin="A4(PA04)" pad="10"/> -<connect gate="G$1" pin="A5(PA06)" pad="11"/> -<connect gate="G$1" pin="A6(PB05)" pad="12"/> -<connect gate="G$1" pin="AREF(PA03)" pad="3"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="33"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="34"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="35"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="36"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="47"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="48"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="51"/> -<connect gate="G$1" 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package="MINI-PCIE-ATK-DAUGHTER"> -<connects> -<connect gate="G$1" pin="+3V3" pad="15 16"/> -<connect gate="G$1" pin="+5V" pad="17 18"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="4"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="5"/> -<connect gate="G$1" pin="A2(PB08)" pad="6"/> -<connect gate="G$1" pin="A3(PB09)" pad="9"/> -<connect gate="G$1" pin="A4(PA04)" pad="10"/> -<connect gate="G$1" pin="A5(PA06)" pad="11"/> -<connect gate="G$1" pin="A6(PB05)" pad="12"/> -<connect gate="G$1" pin="AREF(PA03)" pad="3"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="33"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="34"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="35"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="36"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="47"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="48"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="51"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="52"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="41"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="42"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="45"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="46"/> -<connect gate="G$1" pin="GND" pad="1 2 7 8 13 14 19 20 25 26 31 32 37 38 43 44 49 50 P$1"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="22"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="21"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="24"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="23"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="28"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="27"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="30"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="29"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="39"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="40"/> -<connect gate="G$1" pin="VCC" pad="P$2"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="FX8-MOTHER" package="ATK-BFPP-BOTTOM-FX8-60"> -<connects> -<connect gate="G$1" pin="+3V3" pad="P$28 P$29"/> -<connect gate="G$1" pin="+5V" pad="P$26 P$27"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="P$3"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="P$5"/> -<connect gate="G$1" pin="A2(PB08)" pad="P$6"/> -<connect gate="G$1" pin="A3(PB09)" pad="P$8"/> -<connect gate="G$1" pin="A4(PA04)" pad="P$9"/> -<connect gate="G$1" pin="A5(PA06)" pad="P$11"/> -<connect gate="G$1" pin="A6(PB05)" pad="P$12"/> -<connect gate="G$1" pin="AREF(PA03)" pad="P$2"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="P$49"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="P$48"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="P$46"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="P$45"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="P$37"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="P$36"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="P$34"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="P$33"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="P$42"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="P$40"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="P$19"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="P$20"/> -<connect gate="G$1" pin="GND" pad="P$1 P$4 P$7 P$10 P$13 P$14 P$17 P$18 P$21 P$30 P$31 P$32 P$35 P$38 P$39 P$41 P$43 P$44 P$47 P$50 P$51 P$60 P$62"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="P$58"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="P$59"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="P$56"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="P$57"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="P$54"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="P$55"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="P$52"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="P$53"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="P$15"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="P$16"/> -<connect gate="G$1" pin="VCC" pad="P$61"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="FX8-DAUGHTER" package="ATK-BFPP-TOP-FX8-60"> -<connects> -<connect gate="G$1" pin="+3V3" pad="P$28 P$29"/> -<connect gate="G$1" pin="+5V" pad="P$26 P$27"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="P$3"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="P$5"/> -<connect gate="G$1" pin="A2(PB08)" pad="P$6"/> -<connect gate="G$1" pin="A3(PB09)" pad="P$8"/> -<connect gate="G$1" pin="A4(PA04)" pad="P$9"/> -<connect gate="G$1" pin="A5(PA06)" pad="P$11"/> -<connect gate="G$1" pin="A6(PB05)" pad="P$12"/> -<connect gate="G$1" pin="AREF(PA03)" pad="P$2"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="P$49"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="P$48"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="P$46"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="P$45"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="P$37"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="P$36"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="P$34"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="P$33"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="P$42"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="P$40"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="P$19"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="P$20"/> -<connect gate="G$1" pin="GND" pad="P$1 P$4 P$7 P$10 P$13 P$14 P$17 P$18 P$21 P$30 P$31 P$32 P$35 P$38 P$39 P$41 P$43 P$44 P$47 P$50 P$51 P$60 P$62"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="P$58"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="P$59"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="P$56"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="P$57"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="P$54"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="P$55"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="P$52"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="P$53"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="P$15"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="P$16"/> -<connect gate="G$1" pin="VCC" pad="P$61"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="FX8-THRU" package="ATK-BFPP-THRU-FX8-60"> -<connects> -<connect gate="G$1" pin="+3V3" pad="P$28 P$29 P$90 P$91 P$150 P$151"/> -<connect gate="G$1" pin="+5V" pad="P$26 P$27 P$88 P$89 P$148 P$149"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="P$3 P$65 P$125"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="P$5 P$67 P$127"/> -<connect gate="G$1" pin="A2(PB08)" pad="P$6 P$68 P$128"/> -<connect gate="G$1" pin="A3(PB09)" pad="P$8 P$70 P$130"/> -<connect gate="G$1" pin="A4(PA04)" pad="P$9 P$71 P$131"/> -<connect gate="G$1" pin="A5(PA06)" pad="P$11 P$73 P$133"/> -<connect gate="G$1" pin="A6(PB05)" pad="P$12 P$74 P$134"/> -<connect gate="G$1" pin="AREF(PA03)" pad="P$2 P$64 P$124"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="P$49 P$111 P$171"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="P$48 P$110 P$170"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="P$46 P$108 P$168"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="P$45 P$107 P$167"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="P$37 P$99 P$159"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="P$36 P$98 P$158"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="P$34 P$96 P$156"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="P$33 P$95 P$155"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="P$42 P$104 P$164"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="P$40 P$102 P$162"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="P$19 P$81 P$141"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="P$20 P$82 P$142"/> -<connect gate="G$1" pin="GND" pad="P$1 P$4 P$7 P$10 P$13 P$14 P$17 P$18 P$21 P$30 P$31 P$32 P$35 P$38 P$39 P$41 P$43 P$44 P$47 P$50 P$51 P$60 P$62 P$63 P$66 P$69 P$72 P$75 P$76 P$79 P$80 P$83 P$92 P$93 P$94 P$97 P$100 P$101 P$103 P$105 P$106 P$109 P$112 P$113 P$122 P$123 P$126 P$129 P$132 P$135 P$136 P$139 P$140 P$143 P$152 P$153 P$154 P$157 P$160 P$161 P$163 P$165 P$166 P$169 P$172 P$173 P$182"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="P$58 P$120 P$180"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="P$59 P$121 P$181"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="P$56 P$118 P$178"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="P$57 P$119 P$179"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="P$54 P$116 P$176"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="P$55 P$117 P$177"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="P$52 P$114 P$174"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="P$53 P$115 P$175"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="P$15 P$77 P$137"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="P$16 P$78 P$138"/> -<connect gate="G$1" pin="VCC" pad="P$61"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="" package="ATK-BFPP-0101"> -<connects> -<connect gate="G$1" pin="+3V3" pad="P$A1"/> -<connect gate="G$1" pin="+5V" pad="P$B1"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="P$B3"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="P$B8"/> -<connect gate="G$1" pin="A2(PB08)" pad="P$D3"/> -<connect gate="G$1" pin="A3(PB09)" pad="P$A8"/> -<connect gate="G$1" pin="A4(PA04)" pad="P$A9"/> -<connect gate="G$1" pin="A5(PA06)" pad="P$B9"/> -<connect gate="G$1" pin="A6(PB05)" pad="P$C3"/> -<connect gate="G$1" pin="AREF(PA03)" pad="P$A3"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="P$B6"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="P$B5"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="P$A5"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="P$A6"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="P$D10"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="P$D9"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="P$C9"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="P$C10"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="P$D2"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="P$D1"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="P$C1"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="P$C2"/> -<connect gate="G$1" pin="GND" pad="P$A4 P$A7 P$A10 P$B4 P$B7 P$B10 P$C4 P$D4 P$GND"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="P$D5"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="P$C5"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="P$D6"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="P$C6"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="P$D7"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="P$C7"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="P$D8"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="P$C8"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="P$A2"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="P$B2"/> -<connect gate="G$1" pin="VCC" pad="P$VCC"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -<device name="THT" package="ATK-BFPP-0101-TOPPLATE"> -<connects> -<connect gate="G$1" pin="+3V3" pad="P$A1"/> -<connect gate="G$1" pin="+5V" pad="P$B1"/> -<connect gate="G$1" pin="A0(DAC0)(PA02)" pad="P$B3"/> -<connect gate="G$1" pin="A1(DAC1)(PA05)" pad="P$B8"/> -<connect gate="G$1" pin="A2(PB08)" pad="P$D3"/> -<connect gate="G$1" pin="A3(PB09)" pad="P$A8"/> -<connect gate="G$1" pin="A4(PA04)" pad="P$A9"/> -<connect gate="G$1" pin="A5(PA06)" pad="P$B9"/> -<connect gate="G$1" pin="A6(PB05)" pad="P$C3"/> -<connect gate="G$1" pin="AREF(PA03)" pad="P$A3"/> -<connect gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)" pad="P$B6"/> -<connect gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)" pad="P$B5"/> -<connect gate="G$1" pin="DCA-2-RXD/MISO-(PA18)" pad="P$A5"/> -<connect gate="G$1" pin="DCA-3-CSN-(PA19)" pad="P$A6"/> -<connect gate="G$1" pin="DCB-0(PB12)" pad="P$D10"/> -<connect gate="G$1" pin="DCB-1(PB13)" pad="P$D9"/> -<connect gate="G$1" pin="DCB-2(PB14)" pad="P$C9"/> -<connect gate="G$1" pin="DCB-3(PB15)" pad="P$C10"/> -<connect gate="G$1" pin="DCX-0(PB02)" pad="P$D2"/> -<connect gate="G$1" pin="DCX-1(PB17)" pad="P$D1"/> -<connect gate="G$1" pin="DCX-2(PB00)" pad="P$C1"/> -<connect gate="G$1" pin="DCX-3(PB01)" pad="P$C2"/> -<connect gate="G$1" pin="GND" pad="P$A4 P$A7 P$A10 P$B4 P$B7 P$B10 P$C4 P$D4 P$GND"/> -<connect gate="G$1" pin="PWMAHS(PB10)" pad="P$D5"/> -<connect gate="G$1" pin="PWMALS(PA08)" pad="P$C5"/> -<connect gate="G$1" pin="PWMBHS(PB11)" pad="P$D6"/> -<connect gate="G$1" pin="PWMBLS(PA09)" pad="P$C6"/> -<connect gate="G$1" pin="PWMCHS(PA12)" pad="P$D7"/> -<connect gate="G$1" pin="PWMCLS(PA10)" pad="P$C7"/> -<connect gate="G$1" pin="PWMDHS(PA13)" pad="P$D8"/> -<connect gate="G$1" pin="PWMDLS(PA11)" pad="P$C8"/> -<connect gate="G$1" pin="PWME0(PB30)" pad="P$A2"/> -<connect gate="G$1" pin="PWME1(PB31)" pad="P$B2"/> -<connect gate="G$1" pin="VCC" pad="P$VCC"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -<deviceset name="DDMC-PHY" prefix="J"> -<gates> -<gate name="G$1" symbol="DDMC-PHY" x="0" y="0"/> -</gates> -<devices> -<device name="RJ45TABUPSMD" package="RJ45-LED-SMD-RJWURTH-634008137521"> -<connects> -<connect gate="G$1" pin="3V3-LED" pad="GRNP YLWP"/> -<connect gate="G$1" pin="CLOCKRX-A" pad="P$5"/> -<connect gate="G$1" pin="CLOCKRX-B" pad="P$6"/> -<connect gate="G$1" pin="CLOCKTX-Y" pad="P$8"/> -<connect gate="G$1" pin="CLOCKTX-Z" pad="P$7"/> -<connect gate="G$1" pin="LED-GRN-CATHODE" pad="GRNN"/> -<connect gate="G$1" pin="LED-YLW-CATHODE" pad="YLWN"/> -<connect gate="G$1" pin="RX-A" pad="P$1"/> -<connect gate="G$1" pin="RX-B" pad="P$2"/> -<connect gate="G$1" pin="RX-Y" pad="P$4"/> -<connect gate="G$1" pin="TX-Z" pad="P$3"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="comm"> -<packages> -<package name="DFN-12-4X3"> -<wire x1="-1.5" y1="2" x2="1.5" y2="2" width="0.127" layer="51"/> -<wire x1="1.5" y1="-2" x2="1.5" y2="2" width="0.127" layer="51"/> -<wire x1="-1.5" y1="-2" x2="1.5" y2="-2" width="0.127" layer="51"/> -<smd name="7" x="1.45" y="-1.25" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="PAD" x="0" y="0" dx="0.2" dy="0.2" layer="1" rot="R180"/> -<polygon width="0.127" layer="1"> -<vertex x="0.7" y="-1.25"/> -<vertex x="-0.75" y="-1.25"/> -<vertex x="-0.75" y="0.8"/> -<vertex x="-0.3" y="1.25"/> -<vertex x="0.7" y="1.25"/> -</polygon> -<polygon width="0.127" layer="31"> -<vertex x="0.6" y="-1.15"/> -<vertex x="-0.65" y="-1.15"/> -<vertex x="-0.65" y="0.75"/> -<vertex x="-0.25" y="1.15"/> -<vertex x="0.6" y="1.15"/> -</polygon> -<polygon width="0.127" layer="29"> -<vertex x="-0.75" y="0.8"/> -<vertex x="-0.75" y="-1.25"/> -<vertex x="0.7" y="-1.25"/> -<vertex x="0.7" y="1.25"/> -<vertex x="-0.3" y="1.25"/> -</polygon> -<text x="0" y="-2.151" size="0.6096" layer="25" font="vector" ratio="20" rot="R180" align="bottom-center">>NAME</text> -<text x="0" y="2.151" size="0.6096" layer="27" font="vector" ratio="20" rot="R180" align="top-center">>VALUE</text> -<wire x1="-1.5" y1="-2" x2="-1.5" y2="2" width="0.127" layer="51"/> -<smd name="8" x="1.45" y="-0.75" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="9" x="1.45" y="-0.25" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="10" x="1.45" y="0.25" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="11" x="1.45" y="0.75" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="12" x="1.45" y="1.25" dx="0.25" dy="0.7" layer="1" rot="R90"/> -<smd name="1" x="-1.45" y="1.25" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<smd name="2" x="-1.45" y="0.75" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<smd name="3" x="-1.45" y="0.25" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<smd name="4" x="-1.45" y="-0.25" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<smd name="5" x="-1.45" y="-0.75" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<smd name="6" x="-1.45" y="-1.25" dx="0.25" dy="0.7" layer="1" rot="R270"/> -<wire x1="-1" y1="2" x2="-1.5" y2="1.5" width="0.127" layer="21"/> -</package> -</packages> -<symbols> -<symbol name="RS485-1-1-LTC2855"> -<pin name="B" x="17.78" y="-12.7" length="middle" rot="R180"/> -<pin name="A" x="17.78" y="-7.62" length="middle" rot="R180"/> -<pin name="RO" x="-17.78" y="-10.16" length="middle"/> -<pin name="DE" x="-17.78" y="-17.78" length="middle"/> -<pin name="GND" x="-17.78" y="7.62" length="middle"/> -<pin name="Y" x="17.78" y="-22.86" length="middle" rot="R180"/> -<pin name="Z" x="17.78" y="-17.78" length="middle" rot="R180"/> -<pin name="DI" x="-17.78" y="-22.86" length="middle"/> -<pin name="VCC" x="-17.78" y="15.24" length="middle"/> -<text x="-2.54" y="17.78" size="1.27" layer="95">>NAME</text> -<text x="-2.54" y="-27.94" size="1.27" layer="96">>VALUE</text> -<wire x1="-12.7" y1="17.78" x2="-12.7" y2="-25.4" width="0.254" layer="94"/> -<wire x1="-12.7" y1="-25.4" x2="12.7" y2="-25.4" width="0.254" layer="94"/> -<wire x1="12.7" y1="-25.4" x2="12.7" y2="17.78" width="0.254" layer="94"/> -<wire x1="12.7" y1="17.78" x2="-12.7" y2="17.78" width="0.254" layer="94"/> -<wire x1="-5.08" y1="-10.16" x2="0" y2="-10.16" width="0.254" layer="94"/> -<wire x1="0" y1="-10.16" x2="2.54" y2="-7.62" width="0.254" layer="94"/> -<wire x1="2.54" y1="-7.62" x2="2.54" y2="-12.7" width="0.254" layer="94"/> -<wire x1="2.54" y1="-12.7" x2="0" y2="-10.16" width="0.254" layer="94"/> -<wire x1="0" y1="-17.78" x2="2.54" y2="-20.32" width="0.254" layer="94"/> -<wire x1="2.54" y1="-20.32" x2="0" y2="-22.86" width="0.254" layer="94"/> -<wire x1="0" y1="-22.86" x2="0" y2="-20.32" width="0.254" layer="94"/> -<wire x1="0" y1="-20.32" x2="0" y2="-17.78" width="0.254" layer="94"/> -<wire x1="2.54" y1="-17.78" x2="2.54" y2="-22.86" width="0.254" layer="94"/> -<wire x1="-7.62" y1="-22.86" x2="-2.54" y2="-22.86" width="0.254" layer="94"/> -<wire x1="-2.54" y1="-22.86" x2="-2.54" y2="-20.32" width="0.254" layer="94"/> -<wire x1="-2.54" y1="-20.32" x2="0" y2="-20.32" width="0.254" layer="94"/> -<wire x1="-5.08" y1="-17.78" x2="0" y2="-17.78" width="0.254" layer="94"/> -<circle x="3.302" y="-12.192" radius="0.254" width="0.254" layer="94"/> -<circle x="3.302" y="-22.606" radius="0.254" width="0.254" layer="94"/> -<pin name="!RE!" x="-17.78" y="-5.08" length="middle"/> -<pin name="TE" x="-17.78" y="0" length="middle"/> -</symbol> -</symbols> -<devicesets> -<deviceset name="RS485-1-1-LTC2855"> -<gates> -<gate name="G$1" symbol="RS485-1-1-LTC2855" x="0" y="0"/> -</gates> -<devices> -<device name="" package="DFN-12-4X3"> -<connects> -<connect gate="G$1" pin="!RE!" pad="2"/> -<connect gate="G$1" pin="A" pad="11"/> -<connect gate="G$1" pin="B" pad="10"/> -<connect gate="G$1" pin="DE" pad="3"/> -<connect gate="G$1" pin="DI" pad="4"/> -<connect gate="G$1" pin="GND" pad="6 PAD"/> -<connect gate="G$1" pin="RO" pad="1"/> -<connect gate="G$1" pin="TE" pad="5"/> -<connect gate="G$1" pin="VCC" pad="12"/> -<connect gate="G$1" pin="Y" pad="8"/> -<connect gate="G$1" pin="Z" pad="9"/> -</connects> -<technologies> -<technology name=""/> -</technologies> -</device> -</devices> -</deviceset> -</devicesets> -</library> -<library name="supply1" urn="urn:adsk.eagle:library:371"> -<description><b>Supply Symbols</b><p> - GND, VCC, 0V, +5V, -5V, etc.<p> - Please keep in mind, that these devices are necessary for the - automatic wiring of the supply signals.<p> - The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> - In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> - <author>Created by librarian@cadsoft.de</author></description> -<packages> -</packages> -<symbols> -<symbol name="+3V3" urn="urn:adsk.eagle:symbol:26950/1" library_version="1"> -<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> -<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> -<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text> -<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> -</symbol> -<symbol name="GND" urn="urn:adsk.eagle:symbol:26925/1" library_version="1"> -<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" 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y="309.118" size="1.27" layer="97"/> -<attribute name="TYPE" x="131.064" y="307.34" size="1.27" layer="97"/> -</instance> -<instance part="C5" gate="G$1" x="129.54" y="231.14" smashed="yes"> -<attribute name="NAME" x="131.064" y="234.061" size="1.778" layer="95"/> -<attribute name="VALUE" x="131.064" y="228.981" size="1.778" layer="96"/> -<attribute name="PACKAGE" x="131.064" y="227.076" size="1.27" layer="97"/> -<attribute name="VOLTAGE" x="131.064" y="225.298" size="1.27" layer="97"/> -<attribute name="TYPE" x="131.064" y="223.52" size="1.27" layer="97"/> -</instance> -<instance part="C6" gate="G$1" x="129.54" y="203.2" smashed="yes"> -<attribute name="NAME" x="131.064" y="206.121" size="1.778" layer="95"/> -<attribute name="VALUE" x="131.064" y="201.041" size="1.778" layer="96"/> -<attribute name="PACKAGE" x="131.064" y="199.136" size="1.27" layer="97"/> -<attribute name="VOLTAGE" x="131.064" y="197.358" size="1.27" layer="97"/> -<attribute name="TYPE" x="131.064" y="195.58" size="1.27" layer="97"/> -</instance> -<instance part="C7" gate="G$1" x="129.54" y="116.84" smashed="yes"> -<attribute name="NAME" x="131.064" y="119.761" size="1.778" layer="95"/> -<attribute name="VALUE" x="131.064" y="114.681" size="1.778" layer="96"/> -<attribute name="PACKAGE" x="131.064" y="112.776" size="1.27" layer="97"/> -<attribute name="VOLTAGE" x="131.064" y="110.998" size="1.27" layer="97"/> -<attribute name="TYPE" x="131.064" y="109.22" size="1.27" layer="97"/> -</instance> -<instance part="C8" gate="G$1" x="129.54" y="88.9" smashed="yes"> -<attribute name="NAME" x="131.064" y="91.821" size="1.778" layer="95"/> -<attribute name="VALUE" x="131.064" y="86.741" size="1.778" layer="96"/> -<attribute name="PACKAGE" x="131.064" y="84.836" size="1.27" layer="97"/> -<attribute name="VOLTAGE" x="131.064" y="83.058" size="1.27" layer="97"/> -<attribute name="TYPE" x="131.064" y="81.28" size="1.27" layer="97"/> -</instance> -<instance part="C9" gate="G$1" x="22.86" y="452.12" smashed="yes"> -<attribute name="NAME" x="24.384" y="455.041" size="1.778" layer="95"/> -<attribute name="VALUE" x="24.384" y="449.961" size="1.778" layer="96"/> -<attribute name="PACKAGE" x="24.384" y="448.056" size="1.27" layer="97"/> -<attribute name="VOLTAGE" x="24.384" y="446.278" size="1.27" layer="97"/> -<attribute name="TYPE" x="24.384" y="444.5" size="1.27" layer="97"/> -</instance> -</instances> -<busses> -</busses> -<nets> -<net name="N$1" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="RX-B"/> -<wire x1="190.5" y1="403.86" x2="248.92" y2="403.86" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="B"/> -</segment> -</net> -<net name="N$2" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="RX-A"/> -<wire x1="190.5" y1="408.94" x2="248.92" y2="408.94" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="A"/> -</segment> -</net> -<net name="N$3" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="RX-Y"/> -<wire x1="190.5" y1="393.7" x2="248.92" y2="393.7" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="Y"/> -</segment> -</net> -<net name="N$4" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="TX-Z"/> -<wire x1="190.5" y1="398.78" x2="248.92" y2="398.78" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="Z"/> -</segment> -</net> -<net name="N$5" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="CLOCKRX-B"/> -<pinref part="U$2" gate="G$1" pin="B"/> -<wire x1="246.38" y1="431.8" x2="248.92" y2="431.8" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$6" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="CLOCKRX-A"/> -<pinref part="U$2" gate="G$1" pin="A"/> -<wire x1="246.38" y1="436.88" x2="248.92" y2="436.88" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$7" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="CLOCKTX-Y"/> -<pinref part="U$2" gate="G$1" pin="Y"/> -<wire x1="246.38" y1="421.64" x2="248.92" y2="421.64" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$8" class="0"> -<segment> -<pinref part="J3" gate="G$1" pin="CLOCKTX-Z"/> -<pinref part="U$2" gate="G$1" pin="Z"/> -<wire x1="246.38" y1="426.72" x2="248.92" y2="426.72" width="0.1524" layer="91"/> -</segment> -</net> -<net name="+3V3" class="0"> -<segment> -<pinref part="J1" gate="G$1" pin="+3V3"/> -<pinref part="+3V1" gate="G$1" pin="+3V3"/> -<wire x1="20.32" y1="444.5" x2="22.86" y2="444.5" width="0.1524" layer="91"/> -<pinref part="C9" gate="G$1" pin="2"/> -<wire x1="22.86" y1="444.5" x2="43.18" y2="444.5" width="0.1524" layer="91"/> -<wire x1="22.86" y1="449.58" x2="22.86" y2="444.5" width="0.1524" layer="91"/> -<junction x="22.86" y="444.5"/> -</segment> -<segment> -<pinref part="U$2" gate="G$1" pin="VCC"/> -<pinref part="+3V2" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="459.74" x2="129.54" y2="459.74" width="0.1524" layer="91"/> -<pinref part="U$2" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="459.74" x2="203.2" y2="459.74" width="0.1524" layer="91"/> -<wire x1="203.2" y1="459.74" x2="208.28" y2="459.74" width="0.1524" layer="91"/> -<wire x1="208.28" y1="459.74" x2="210.82" y2="459.74" width="0.1524" layer="91"/> -<wire x1="210.82" y1="444.5" x2="208.28" y2="444.5" width="0.1524" layer="91"/> -<wire x1="208.28" y1="444.5" x2="208.28" y2="459.74" width="0.1524" layer="91"/> -<junction x="208.28" y="459.74"/> -<pinref part="U$2" gate="G$1" pin="DE"/> -<wire x1="210.82" y1="426.72" x2="203.2" y2="426.72" width="0.1524" layer="91"/> -<wire x1="203.2" y1="426.72" x2="203.2" y2="459.74" width="0.1524" layer="91"/> -<junction x="203.2" y="459.74"/> -<pinref part="C1" gate="G$1" pin="1"/> -<junction x="129.54" y="459.74"/> -</segment> -<segment> -<pinref part="U$3" gate="G$1" pin="VCC"/> -<pinref part="+3V3" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="431.8" x2="129.54" y2="431.8" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="431.8" x2="147.32" y2="431.8" width="0.1524" layer="91"/> -<wire x1="147.32" y1="431.8" x2="152.4" y2="431.8" width="0.1524" layer="91"/> -<wire x1="152.4" y1="431.8" x2="154.94" y2="431.8" width="0.1524" layer="91"/> -<wire x1="154.94" y1="416.56" x2="152.4" y2="416.56" width="0.1524" layer="91"/> -<wire x1="152.4" y1="416.56" x2="152.4" y2="431.8" width="0.1524" layer="91"/> -<junction x="152.4" y="431.8"/> -<pinref part="U$3" gate="G$1" pin="DE"/> -<wire x1="154.94" y1="398.78" x2="147.32" y2="398.78" width="0.1524" layer="91"/> -<wire x1="147.32" y1="398.78" x2="147.32" y2="431.8" width="0.1524" layer="91"/> -<junction x="147.32" y="431.8"/> -<pinref part="C2" gate="G$1" pin="1"/> -<junction x="129.54" y="431.8"/> -</segment> -<segment> -<pinref part="+3V4" gate="G$1" pin="+3V3"/> -<pinref part="J3" gate="G$1" pin="3V3-LED"/> -<wire x1="121.92" y1="383.54" x2="248.92" y2="383.54" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U$4" gate="G$1" pin="VCC"/> -<pinref part="+3V5" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="347.98" x2="129.54" y2="347.98" width="0.1524" layer="91"/> -<pinref part="U$4" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="347.98" x2="203.2" y2="347.98" width="0.1524" layer="91"/> -<wire x1="203.2" y1="347.98" x2="208.28" y2="347.98" width="0.1524" layer="91"/> -<wire x1="208.28" y1="347.98" x2="210.82" y2="347.98" width="0.1524" layer="91"/> -<wire x1="210.82" y1="332.74" x2="208.28" y2="332.74" width="0.1524" layer="91"/> -<wire x1="208.28" y1="332.74" x2="208.28" y2="347.98" width="0.1524" layer="91"/> -<junction x="208.28" y="347.98"/> -<pinref part="U$4" gate="G$1" pin="DE"/> -<wire x1="210.82" y1="314.96" x2="203.2" y2="314.96" width="0.1524" layer="91"/> -<wire x1="203.2" y1="314.96" x2="203.2" y2="347.98" width="0.1524" layer="91"/> -<junction x="203.2" y="347.98"/> -<pinref part="C3" gate="G$1" pin="1"/> -<junction x="129.54" y="347.98"/> -</segment> -<segment> -<pinref part="U$5" gate="G$1" pin="VCC"/> -<pinref part="+3V6" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="320.04" x2="129.54" y2="320.04" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="320.04" x2="147.32" y2="320.04" width="0.1524" layer="91"/> -<wire x1="147.32" y1="320.04" x2="152.4" y2="320.04" width="0.1524" layer="91"/> -<wire x1="152.4" y1="320.04" x2="154.94" y2="320.04" width="0.1524" layer="91"/> -<wire x1="154.94" y1="304.8" x2="152.4" y2="304.8" width="0.1524" layer="91"/> -<wire x1="152.4" y1="304.8" x2="152.4" y2="320.04" width="0.1524" layer="91"/> -<junction x="152.4" y="320.04"/> -<pinref part="U$5" gate="G$1" pin="DE"/> -<wire x1="154.94" y1="287.02" x2="147.32" y2="287.02" width="0.1524" layer="91"/> -<wire x1="147.32" y1="287.02" x2="147.32" y2="320.04" width="0.1524" layer="91"/> -<junction x="147.32" y="320.04"/> -<pinref part="C4" gate="G$1" pin="1"/> -<junction x="129.54" y="320.04"/> -</segment> -<segment> -<pinref part="+3V7" gate="G$1" pin="+3V3"/> -<pinref part="J2" gate="G$1" pin="3V3-LED"/> -<wire x1="121.92" y1="271.78" x2="248.92" y2="271.78" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U$6" gate="G$1" pin="VCC"/> -<pinref part="+3V8" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="236.22" x2="129.54" y2="236.22" width="0.1524" layer="91"/> -<pinref part="U$6" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="236.22" x2="203.2" y2="236.22" width="0.1524" layer="91"/> -<wire x1="203.2" y1="236.22" x2="208.28" y2="236.22" width="0.1524" layer="91"/> -<wire x1="208.28" y1="236.22" x2="210.82" y2="236.22" width="0.1524" layer="91"/> -<wire x1="210.82" y1="220.98" x2="208.28" y2="220.98" width="0.1524" layer="91"/> -<wire x1="208.28" y1="220.98" x2="208.28" y2="236.22" width="0.1524" layer="91"/> -<junction x="208.28" y="236.22"/> -<pinref part="U$6" gate="G$1" pin="DE"/> -<wire x1="210.82" y1="203.2" x2="203.2" y2="203.2" width="0.1524" layer="91"/> -<wire x1="203.2" y1="203.2" x2="203.2" y2="236.22" width="0.1524" layer="91"/> -<junction x="203.2" y="236.22"/> -<pinref part="C5" gate="G$1" pin="1"/> -<junction x="129.54" y="236.22"/> -</segment> -<segment> -<pinref part="U$7" gate="G$1" pin="VCC"/> -<pinref part="+3V9" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="208.28" x2="129.54" y2="208.28" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="208.28" x2="147.32" y2="208.28" width="0.1524" layer="91"/> -<wire x1="147.32" y1="208.28" x2="152.4" y2="208.28" width="0.1524" layer="91"/> -<wire x1="152.4" y1="208.28" x2="154.94" y2="208.28" width="0.1524" layer="91"/> -<wire x1="154.94" y1="193.04" x2="152.4" y2="193.04" width="0.1524" layer="91"/> -<wire x1="152.4" y1="193.04" x2="152.4" y2="208.28" width="0.1524" layer="91"/> -<junction x="152.4" y="208.28"/> -<pinref part="U$7" gate="G$1" pin="DE"/> -<wire x1="154.94" y1="175.26" x2="147.32" y2="175.26" width="0.1524" layer="91"/> -<wire x1="147.32" y1="175.26" x2="147.32" y2="208.28" width="0.1524" layer="91"/> -<junction x="147.32" y="208.28"/> -<pinref part="C6" gate="G$1" pin="1"/> -<junction x="129.54" y="208.28"/> -</segment> -<segment> -<pinref part="+3V10" gate="G$1" pin="+3V3"/> -<pinref part="J4" gate="G$1" pin="3V3-LED"/> -<wire x1="121.92" y1="160.02" x2="248.92" y2="160.02" width="0.1524" layer="91"/> -</segment> -<segment> -<pinref part="U$8" gate="G$1" pin="VCC"/> -<pinref part="+3V11" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="121.92" x2="129.54" y2="121.92" width="0.1524" layer="91"/> -<pinref part="U$8" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="121.92" x2="203.2" y2="121.92" width="0.1524" layer="91"/> -<wire x1="203.2" y1="121.92" x2="208.28" y2="121.92" width="0.1524" layer="91"/> -<wire x1="208.28" y1="121.92" x2="210.82" y2="121.92" width="0.1524" layer="91"/> -<wire x1="210.82" y1="106.68" x2="208.28" y2="106.68" width="0.1524" layer="91"/> -<wire x1="208.28" y1="106.68" x2="208.28" y2="121.92" width="0.1524" layer="91"/> -<junction x="208.28" y="121.92"/> -<pinref part="U$8" gate="G$1" pin="DE"/> -<wire x1="210.82" y1="88.9" x2="203.2" y2="88.9" width="0.1524" layer="91"/> -<wire x1="203.2" y1="88.9" x2="203.2" y2="121.92" width="0.1524" layer="91"/> -<junction x="203.2" y="121.92"/> -<pinref part="C7" gate="G$1" pin="1"/> -<junction x="129.54" y="121.92"/> -</segment> -<segment> -<pinref part="U$9" gate="G$1" pin="VCC"/> -<pinref part="+3V12" gate="G$1" pin="+3V3"/> -<wire x1="121.92" y1="93.98" x2="129.54" y2="93.98" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="TE"/> -<wire x1="129.54" y1="93.98" x2="147.32" y2="93.98" width="0.1524" layer="91"/> -<wire x1="147.32" y1="93.98" x2="152.4" y2="93.98" width="0.1524" layer="91"/> -<wire x1="152.4" y1="93.98" x2="154.94" y2="93.98" width="0.1524" layer="91"/> -<wire x1="154.94" y1="78.74" x2="152.4" y2="78.74" width="0.1524" layer="91"/> -<wire x1="152.4" y1="78.74" x2="152.4" y2="93.98" width="0.1524" layer="91"/> -<junction x="152.4" y="93.98"/> -<pinref part="U$9" gate="G$1" pin="DE"/> -<wire x1="154.94" y1="60.96" x2="147.32" y2="60.96" width="0.1524" layer="91"/> -<wire x1="147.32" y1="60.96" x2="147.32" y2="93.98" width="0.1524" layer="91"/> -<junction x="147.32" y="93.98"/> -<pinref part="C8" gate="G$1" pin="1"/> -<junction x="129.54" y="93.98"/> -</segment> -<segment> -<pinref part="+3V13" gate="G$1" pin="+3V3"/> -<pinref part="J7" gate="G$1" pin="3V3-LED"/> -<wire x1="121.92" y1="45.72" x2="248.92" y2="45.72" width="0.1524" layer="91"/> -</segment> -</net> -<net name="GND" class="0"> -<segment> -<pinref part="J1" gate="G$1" pin="GND"/> -<pinref part="GND1" gate="1" pin="GND"/> -<wire x1="20.32" y1="459.74" x2="22.86" y2="459.74" width="0.1524" layer="91"/> -<pinref part="C9" gate="G$1" pin="1"/> -<wire x1="22.86" y1="459.74" x2="43.18" y2="459.74" width="0.1524" layer="91"/> -<wire x1="22.86" y1="457.2" x2="22.86" y2="459.74" width="0.1524" layer="91"/> -<junction x="22.86" y="459.74"/> -</segment> -<segment> -<pinref part="U$2" gate="G$1" pin="GND"/> -<pinref part="GND2" gate="1" pin="GND"/> -<wire x1="121.92" y1="452.12" x2="129.54" y2="452.12" width="0.1524" layer="91"/> -<pinref part="U$2" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="452.12" x2="205.74" y2="452.12" width="0.1524" layer="91"/> -<wire x1="205.74" y1="452.12" x2="210.82" y2="452.12" width="0.1524" layer="91"/> -<wire x1="210.82" y1="439.42" x2="205.74" y2="439.42" width="0.1524" layer="91"/> -<wire x1="205.74" y1="439.42" x2="205.74" y2="452.12" width="0.1524" layer="91"/> -<junction x="205.74" y="452.12"/> -<pinref part="C1" gate="G$1" pin="2"/> -<junction x="129.54" y="452.12"/> -</segment> -<segment> -<pinref part="U$3" gate="G$1" pin="GND"/> -<pinref part="GND3" gate="1" pin="GND"/> -<wire x1="121.92" y1="424.18" x2="129.54" y2="424.18" width="0.1524" layer="91"/> -<pinref part="U$3" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="424.18" x2="149.86" y2="424.18" width="0.1524" layer="91"/> -<wire x1="149.86" y1="424.18" x2="154.94" y2="424.18" width="0.1524" layer="91"/> -<wire x1="154.94" y1="411.48" x2="149.86" y2="411.48" width="0.1524" layer="91"/> -<wire x1="149.86" y1="411.48" x2="149.86" y2="424.18" width="0.1524" layer="91"/> -<junction x="149.86" y="424.18"/> -<pinref part="C2" gate="G$1" pin="2"/> -<junction x="129.54" y="424.18"/> -</segment> -<segment> -<pinref part="U$4" gate="G$1" pin="GND"/> -<pinref part="GND4" gate="1" pin="GND"/> -<wire x1="121.92" y1="340.36" x2="129.54" y2="340.36" width="0.1524" layer="91"/> -<pinref part="U$4" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="340.36" x2="205.74" y2="340.36" width="0.1524" layer="91"/> -<wire x1="205.74" y1="340.36" x2="210.82" y2="340.36" width="0.1524" layer="91"/> -<wire x1="210.82" y1="327.66" x2="205.74" y2="327.66" width="0.1524" layer="91"/> -<wire x1="205.74" y1="327.66" x2="205.74" y2="340.36" width="0.1524" layer="91"/> -<junction x="205.74" y="340.36"/> -<pinref part="C3" gate="G$1" pin="2"/> -<junction x="129.54" y="340.36"/> -</segment> -<segment> -<pinref part="U$5" gate="G$1" pin="GND"/> -<pinref part="GND5" gate="1" pin="GND"/> -<wire x1="121.92" y1="312.42" x2="129.54" y2="312.42" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="312.42" x2="149.86" y2="312.42" width="0.1524" layer="91"/> -<wire x1="149.86" y1="312.42" x2="154.94" y2="312.42" width="0.1524" layer="91"/> -<wire x1="154.94" y1="299.72" x2="149.86" y2="299.72" width="0.1524" layer="91"/> -<wire x1="149.86" y1="299.72" x2="149.86" y2="312.42" width="0.1524" layer="91"/> -<junction x="149.86" y="312.42"/> -<pinref part="C4" gate="G$1" pin="2"/> -<junction x="129.54" y="312.42"/> -</segment> -<segment> -<pinref part="U$6" gate="G$1" pin="GND"/> -<pinref part="GND6" gate="1" pin="GND"/> -<wire x1="121.92" y1="228.6" x2="129.54" y2="228.6" width="0.1524" layer="91"/> -<pinref part="U$6" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="228.6" x2="205.74" y2="228.6" width="0.1524" layer="91"/> -<wire x1="205.74" y1="228.6" x2="210.82" y2="228.6" width="0.1524" layer="91"/> -<wire x1="210.82" y1="215.9" x2="205.74" y2="215.9" width="0.1524" layer="91"/> -<wire x1="205.74" y1="215.9" x2="205.74" y2="228.6" width="0.1524" layer="91"/> -<junction x="205.74" y="228.6"/> -<pinref part="C5" gate="G$1" pin="2"/> -<junction x="129.54" y="228.6"/> -</segment> -<segment> -<pinref part="U$7" gate="G$1" pin="GND"/> -<pinref part="GND7" gate="1" pin="GND"/> -<wire x1="121.92" y1="200.66" x2="129.54" y2="200.66" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="200.66" x2="149.86" y2="200.66" width="0.1524" layer="91"/> -<wire x1="149.86" y1="200.66" x2="154.94" y2="200.66" width="0.1524" layer="91"/> -<wire x1="154.94" y1="187.96" x2="149.86" y2="187.96" width="0.1524" layer="91"/> -<wire x1="149.86" y1="187.96" x2="149.86" y2="200.66" width="0.1524" layer="91"/> -<junction x="149.86" y="200.66"/> -<pinref part="C6" gate="G$1" pin="2"/> -<junction x="129.54" y="200.66"/> -</segment> -<segment> -<pinref part="U$8" gate="G$1" pin="GND"/> -<pinref part="GND8" gate="1" pin="GND"/> -<wire x1="121.92" y1="114.3" x2="129.54" y2="114.3" width="0.1524" layer="91"/> -<pinref part="U$8" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="114.3" x2="205.74" y2="114.3" width="0.1524" layer="91"/> -<wire x1="205.74" y1="114.3" x2="210.82" y2="114.3" width="0.1524" layer="91"/> -<wire x1="210.82" y1="101.6" x2="205.74" y2="101.6" width="0.1524" layer="91"/> -<wire x1="205.74" y1="101.6" x2="205.74" y2="114.3" width="0.1524" layer="91"/> -<junction x="205.74" y="114.3"/> -<pinref part="C7" gate="G$1" pin="2"/> -<junction x="129.54" y="114.3"/> -</segment> -<segment> -<pinref part="U$9" gate="G$1" pin="GND"/> -<pinref part="GND9" gate="1" pin="GND"/> -<wire x1="121.92" y1="86.36" x2="129.54" y2="86.36" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="!RE!"/> -<wire x1="129.54" y1="86.36" x2="149.86" y2="86.36" width="0.1524" layer="91"/> -<wire x1="149.86" y1="86.36" x2="154.94" y2="86.36" width="0.1524" layer="91"/> -<wire x1="154.94" y1="73.66" x2="149.86" y2="73.66" width="0.1524" layer="91"/> -<wire x1="149.86" y1="73.66" x2="149.86" y2="86.36" width="0.1524" layer="91"/> -<junction x="149.86" y="86.36"/> -<pinref part="C8" gate="G$1" pin="2"/> -<junction x="129.54" y="86.36"/> -</segment> -</net> -<net name="PB-CLKIN" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="RO"/> -<wire x1="210.82" y1="434.34" x2="187.96" y2="434.34" width="0.1524" layer="91"/> -<label x="187.96" y="434.34" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCB-3(PB15)"/> -<wire x1="43.18" y1="340.36" x2="22.86" y2="340.36" width="0.1524" layer="91"/> -<label x="22.86" y="340.36" size="1.778" layer="95"/> -</segment> -</net> -<net name="PB-CLKOUT" class="0"> -<segment> -<pinref part="U$2" gate="G$1" pin="DI"/> -<wire x1="210.82" y1="421.64" x2="187.96" y2="421.64" width="0.1524" layer="91"/> -<label x="187.96" y="421.64" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCB-1(PB13)"/> -<wire x1="43.18" y1="345.44" x2="22.86" y2="345.44" width="0.1524" layer="91"/> -<label x="22.86" y="345.44" size="1.778" layer="95"/> -</segment> -</net> -<net name="N$9" class="0"> -<segment> -<pinref part="R1" gate="G$1" pin="2"/> -<pinref part="J3" gate="G$1" pin="LED-GRN-CATHODE"/> -<wire x1="246.38" y1="375.92" x2="248.92" y2="375.92" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$10" class="0"> -<segment> -<pinref part="R2" gate="G$1" pin="2"/> -<pinref part="J3" gate="G$1" pin="LED-YLW-CATHODE"/> -<wire x1="246.38" y1="365.76" x2="248.92" y2="365.76" width="0.1524" layer="91"/> -</segment> -</net> -<net name="PB-GREEN" class="0"> -<segment> -<pinref part="R1" gate="G$1" pin="1"/> -<wire x1="236.22" y1="375.92" x2="218.44" y2="375.92" width="0.1524" layer="91"/> -<label x="218.44" y="375.92" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A4(PA04)"/> -<wire x1="43.18" y1="416.56" x2="22.86" y2="416.56" width="0.1524" layer="91"/> -<label x="22.86" y="416.56" size="1.778" layer="95"/> -</segment> -</net> -<net name="PB-YELLOW" class="0"> -<segment> -<pinref part="R2" gate="G$1" pin="1"/> -<wire x1="236.22" y1="365.76" x2="218.44" y2="365.76" width="0.1524" layer="91"/> -<label x="218.44" y="365.76" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A3(PB09)"/> -<wire x1="43.18" y1="419.1" x2="22.86" y2="419.1" width="0.1524" layer="91"/> -<label x="22.86" y="419.1" size="1.778" layer="95"/> -</segment> -</net> -<net name="N$11" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="RX-B"/> -<wire x1="190.5" y1="292.1" x2="248.92" y2="292.1" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="B"/> -</segment> -</net> -<net name="N$12" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="RX-A"/> -<wire x1="190.5" y1="297.18" x2="248.92" y2="297.18" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="A"/> -</segment> -</net> -<net name="N$13" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="RX-Y"/> -<wire x1="190.5" y1="281.94" x2="248.92" y2="281.94" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="Y"/> -</segment> -</net> -<net name="N$14" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="TX-Z"/> -<wire x1="190.5" y1="287.02" x2="248.92" y2="287.02" width="0.1524" layer="91"/> -<pinref part="U$5" gate="G$1" pin="Z"/> -</segment> -</net> -<net name="N$15" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="CLOCKRX-B"/> -<pinref part="U$4" gate="G$1" pin="B"/> -<wire x1="246.38" y1="320.04" x2="248.92" y2="320.04" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$16" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="CLOCKRX-A"/> -<pinref part="U$4" gate="G$1" pin="A"/> -<wire x1="246.38" y1="325.12" x2="248.92" y2="325.12" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$17" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="CLOCKTX-Y"/> -<pinref part="U$4" gate="G$1" pin="Y"/> -<wire x1="246.38" y1="309.88" x2="248.92" y2="309.88" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$18" class="0"> -<segment> -<pinref part="J2" gate="G$1" pin="CLOCKTX-Z"/> -<pinref part="U$4" gate="G$1" pin="Z"/> -<wire x1="246.38" y1="314.96" x2="248.92" y2="314.96" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$19" class="0"> -<segment> -<pinref part="R3" gate="G$1" pin="2"/> -<pinref part="J2" gate="G$1" pin="LED-GRN-CATHODE"/> -<wire x1="246.38" y1="264.16" x2="248.92" y2="264.16" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$20" class="0"> -<segment> -<pinref part="R4" gate="G$1" pin="2"/> -<pinref part="J2" gate="G$1" pin="LED-YLW-CATHODE"/> -<wire x1="246.38" y1="254" x2="248.92" y2="254" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$21" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="RX-B"/> -<wire x1="190.5" y1="180.34" x2="248.92" y2="180.34" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="B"/> -</segment> -</net> -<net name="N$22" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="RX-A"/> -<wire x1="190.5" y1="185.42" x2="248.92" y2="185.42" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="A"/> -</segment> -</net> -<net name="N$23" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="RX-Y"/> -<wire x1="190.5" y1="170.18" x2="248.92" y2="170.18" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="Y"/> -</segment> -</net> -<net name="N$24" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="TX-Z"/> -<wire x1="190.5" y1="175.26" x2="248.92" y2="175.26" width="0.1524" layer="91"/> -<pinref part="U$7" gate="G$1" pin="Z"/> -</segment> -</net> -<net name="N$25" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="CLOCKRX-B"/> -<pinref part="U$6" gate="G$1" pin="B"/> -<wire x1="246.38" y1="208.28" x2="248.92" y2="208.28" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$26" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="CLOCKRX-A"/> -<pinref part="U$6" gate="G$1" pin="A"/> -<wire x1="246.38" y1="213.36" x2="248.92" y2="213.36" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$27" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="CLOCKTX-Y"/> -<pinref part="U$6" gate="G$1" pin="Y"/> -<wire x1="246.38" y1="198.12" x2="248.92" y2="198.12" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$28" class="0"> -<segment> -<pinref part="J4" gate="G$1" pin="CLOCKTX-Z"/> -<pinref part="U$6" gate="G$1" pin="Z"/> -<wire x1="246.38" y1="203.2" x2="248.92" y2="203.2" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$29" class="0"> -<segment> -<pinref part="R5" gate="G$1" pin="2"/> -<pinref part="J4" gate="G$1" pin="LED-GRN-CATHODE"/> -<wire x1="246.38" y1="152.4" x2="248.92" y2="152.4" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$30" class="0"> -<segment> -<pinref part="R6" gate="G$1" pin="2"/> -<pinref part="J4" gate="G$1" pin="LED-YLW-CATHODE"/> -<wire x1="246.38" y1="142.24" x2="248.92" y2="142.24" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$31" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="RX-B"/> -<wire x1="190.5" y1="66.04" x2="248.92" y2="66.04" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="B"/> -</segment> -</net> -<net name="N$32" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="RX-A"/> -<wire x1="190.5" y1="71.12" x2="248.92" y2="71.12" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="A"/> -</segment> -</net> -<net name="N$33" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="RX-Y"/> -<wire x1="190.5" y1="55.88" x2="248.92" y2="55.88" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="Y"/> -</segment> -</net> -<net name="N$34" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="TX-Z"/> -<wire x1="190.5" y1="60.96" x2="248.92" y2="60.96" width="0.1524" layer="91"/> -<pinref part="U$9" gate="G$1" pin="Z"/> -</segment> -</net> -<net name="N$35" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="CLOCKRX-B"/> -<pinref part="U$8" gate="G$1" pin="B"/> -<wire x1="246.38" y1="93.98" x2="248.92" y2="93.98" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$36" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="CLOCKRX-A"/> -<pinref part="U$8" gate="G$1" pin="A"/> -<wire x1="246.38" y1="99.06" x2="248.92" y2="99.06" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$37" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="CLOCKTX-Y"/> -<pinref part="U$8" gate="G$1" pin="Y"/> -<wire x1="246.38" y1="83.82" x2="248.92" y2="83.82" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$38" class="0"> -<segment> -<pinref part="J7" gate="G$1" pin="CLOCKTX-Z"/> -<pinref part="U$8" gate="G$1" pin="Z"/> -<wire x1="246.38" y1="88.9" x2="248.92" y2="88.9" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$39" class="0"> -<segment> -<pinref part="R7" gate="G$1" pin="2"/> -<pinref part="J7" gate="G$1" pin="LED-GRN-CATHODE"/> -<wire x1="246.38" y1="38.1" x2="248.92" y2="38.1" width="0.1524" layer="91"/> -</segment> -</net> -<net name="N$40" class="0"> -<segment> -<pinref part="R8" gate="G$1" pin="2"/> -<pinref part="J7" gate="G$1" pin="LED-YLW-CATHODE"/> -<wire x1="246.38" y1="27.94" x2="248.92" y2="27.94" width="0.1524" layer="91"/> -</segment> -</net> -<net name="PC-CLKIN" class="0"> -<segment> -<pinref part="U$4" gate="G$1" pin="RO"/> -<wire x1="210.82" y1="322.58" x2="187.96" y2="322.58" width="0.1524" layer="91"/> -<label x="187.96" y="322.58" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="PWMDLS(PA11)"/> -<wire x1="43.18" y1="391.16" x2="22.86" y2="391.16" width="0.1524" layer="91"/> -<label x="22.86" y="391.16" size="1.778" layer="95"/> -</segment> -</net> -<net name="PC-CLKOUT" class="0"> -<segment> -<pinref part="U$4" gate="G$1" pin="DI"/> -<wire x1="210.82" y1="309.88" x2="187.96" y2="309.88" width="0.1524" layer="91"/> -<label x="187.96" y="309.88" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="PWMBLS(PA09)"/> -<wire x1="43.18" y1="401.32" x2="22.86" y2="401.32" width="0.1524" layer="91"/> -<label x="22.86" y="401.32" size="1.778" layer="95"/> -</segment> -</net> -<net name="PC-RX" class="0"> -<segment> -<pinref part="U$5" gate="G$1" pin="RO"/> -<wire x1="154.94" y1="294.64" x2="114.3" y2="294.64" width="0.1524" layer="91"/> -<label x="114.3" y="294.64" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="PWMCLS(PA10)"/> -<wire x1="43.18" y1="396.24" x2="22.86" y2="396.24" width="0.1524" layer="91"/> -<label x="22.86" y="396.24" size="1.778" layer="95"/> -</segment> -</net> -<net name="PC-TX" class="0"> -<segment> -<pinref part="U$5" gate="G$1" pin="DI"/> -<wire x1="154.94" y1="281.94" x2="114.3" y2="281.94" width="0.1524" layer="91"/> -<label x="114.3" y="281.94" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="PWMALS(PA08)"/> -<wire x1="43.18" y1="406.4" x2="22.86" y2="406.4" width="0.1524" layer="91"/> -<label x="22.86" y="406.4" size="1.778" layer="95"/> -</segment> -</net> -<net name="PB-RX" class="0"> -<segment> -<pinref part="U$3" gate="G$1" pin="RO"/> -<wire x1="154.94" y1="406.4" x2="114.3" y2="406.4" width="0.1524" layer="91"/> -<label x="114.3" y="406.4" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCB-2(PB14)"/> -<wire x1="43.18" y1="342.9" x2="22.86" y2="342.9" width="0.1524" layer="91"/> -<label x="22.86" y="342.9" size="1.778" layer="95"/> -</segment> -</net> -<net name="PB-TX" class="0"> -<segment> -<pinref part="U$3" gate="G$1" pin="DI"/> -<wire x1="154.94" y1="393.7" x2="114.3" y2="393.7" width="0.1524" layer="91"/> -<label x="114.3" y="393.7" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCB-0(PB12)"/> -<wire x1="43.18" y1="347.98" x2="22.86" y2="347.98" width="0.1524" layer="91"/> -<label x="22.86" y="347.98" size="1.778" layer="95"/> -</segment> -</net> -<net name="PC-GREEN" class="0"> -<segment> -<pinref part="R3" gate="G$1" pin="1"/> -<wire x1="236.22" y1="264.16" x2="218.44" y2="264.16" width="0.1524" layer="91"/> -<label x="218.44" y="264.16" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A5(PA06)"/> -<wire x1="43.18" y1="414.02" x2="22.86" y2="414.02" width="0.1524" layer="91"/> -<label x="22.86" y="414.02" size="1.778" layer="95"/> -</segment> -</net> -<net name="PC-YELLOW" class="0"> -<segment> -<pinref part="R4" gate="G$1" pin="1"/> -<wire x1="236.22" y1="254" x2="218.44" y2="254" width="0.1524" layer="91"/> -<label x="218.44" y="254" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A1(DAC1)(PA05)"/> -<wire x1="43.18" y1="424.18" x2="22.86" y2="424.18" width="0.1524" layer="91"/> -<label x="22.86" y="424.18" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-CLKIN" class="0"> -<segment> -<pinref part="U$6" gate="G$1" pin="RO"/> -<wire x1="210.82" y1="210.82" x2="187.96" y2="210.82" width="0.1524" layer="91"/> -<label x="187.96" y="210.82" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCA-3-CSN-(PA19)"/> -<wire x1="43.18" y1="375.92" x2="22.86" y2="375.92" width="0.1524" layer="91"/> -<label x="22.86" y="375.92" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-CLKOUT" class="0"> -<segment> -<pinref part="U$6" gate="G$1" pin="DI"/> -<wire x1="210.82" y1="198.12" x2="187.96" y2="198.12" width="0.1524" layer="91"/> -<label x="187.96" y="198.12" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCA-1-SCL/XCL/CLK-(PA17)"/> -<wire x1="43.18" y1="381" x2="22.86" y2="381" width="0.1524" layer="91"/> -<label x="22.86" y="381" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-RX" class="0"> -<segment> -<pinref part="U$7" gate="G$1" pin="RO"/> -<wire x1="154.94" y1="182.88" x2="114.3" y2="182.88" width="0.1524" layer="91"/> -<label x="114.3" y="182.88" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCA-2-RXD/MISO-(PA18)"/> -<wire x1="43.18" y1="378.46" x2="22.86" y2="378.46" width="0.1524" layer="91"/> -<label x="22.86" y="378.46" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-TX" class="0"> -<segment> -<pinref part="U$7" gate="G$1" pin="DI"/> -<wire x1="154.94" y1="170.18" x2="114.3" y2="170.18" width="0.1524" layer="91"/> -<label x="114.3" y="170.18" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCA-0-SDA/TXD/MOSI-(PA16)"/> -<wire x1="43.18" y1="383.54" x2="22.86" y2="383.54" width="0.1524" layer="91"/> -<label x="22.86" y="383.54" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-GREEN" class="0"> -<segment> -<pinref part="R5" gate="G$1" pin="1"/> -<wire x1="236.22" y1="152.4" x2="218.44" y2="152.4" width="0.1524" layer="91"/> -<label x="218.44" y="152.4" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A0(DAC0)(PA02)"/> -<wire x1="43.18" y1="426.72" x2="22.86" y2="426.72" width="0.1524" layer="91"/> -<label x="22.86" y="426.72" size="1.778" layer="95"/> -</segment> -</net> -<net name="PD-YELLOW" class="0"> -<segment> -<pinref part="R6" gate="G$1" pin="1"/> -<wire x1="236.22" y1="142.24" x2="218.44" y2="142.24" width="0.1524" layer="91"/> -<label x="218.44" y="142.24" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="AREF(PA03)"/> -<wire x1="43.18" y1="429.26" x2="22.86" y2="429.26" width="0.1524" layer="91"/> -<label x="22.86" y="429.26" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-CLKIN" class="0"> -<segment> -<pinref part="U$8" gate="G$1" pin="RO"/> -<wire x1="210.82" y1="96.52" x2="187.96" y2="96.52" width="0.1524" layer="91"/> -<label x="187.96" y="96.52" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCX-3(PB01)"/> -<wire x1="43.18" y1="355.6" x2="22.86" y2="355.6" width="0.1524" layer="91"/> -<label x="22.86" y="355.6" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-CLKOUT" class="0"> -<segment> -<pinref part="U$8" gate="G$1" pin="DI"/> -<wire x1="210.82" y1="83.82" x2="187.96" y2="83.82" width="0.1524" layer="91"/> -<label x="187.96" y="83.82" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCX-1(PB17)"/> -<wire x1="43.18" y1="360.68" x2="22.86" y2="360.68" width="0.1524" layer="91"/> -<label x="22.86" y="360.68" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-RX" class="0"> -<segment> -<pinref part="U$9" gate="G$1" pin="RO"/> -<wire x1="154.94" y1="68.58" x2="114.3" y2="68.58" width="0.1524" layer="91"/> -<label x="114.3" y="68.58" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCX-2(PB00)"/> -<wire x1="43.18" y1="358.14" x2="22.86" y2="358.14" width="0.1524" layer="91"/> -<label x="22.86" y="358.14" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-TX" class="0"> -<segment> -<pinref part="U$9" gate="G$1" pin="DI"/> -<wire x1="154.94" y1="55.88" x2="114.3" y2="55.88" width="0.1524" layer="91"/> -<label x="114.3" y="55.88" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="DCX-0(PB02)"/> -<wire x1="43.18" y1="363.22" x2="22.86" y2="363.22" width="0.1524" layer="91"/> -<label x="22.86" y="363.22" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-GREEN" class="0"> -<segment> -<pinref part="R7" gate="G$1" pin="1"/> -<wire x1="236.22" y1="38.1" x2="218.44" y2="38.1" width="0.1524" layer="91"/> -<label x="218.44" y="38.1" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A2(PB08)"/> -<wire x1="43.18" y1="421.64" x2="22.86" y2="421.64" width="0.1524" layer="91"/> -<label x="22.86" y="421.64" size="1.778" layer="95"/> -</segment> -</net> -<net name="PE-YELLOW" class="0"> -<segment> -<pinref part="R8" gate="G$1" pin="1"/> -<wire x1="236.22" y1="27.94" x2="218.44" y2="27.94" width="0.1524" layer="91"/> -<label x="218.44" y="27.94" size="1.778" layer="95"/> -</segment> -<segment> -<pinref part="J1" gate="G$1" pin="A6(PB05)"/> -<wire x1="43.18" y1="411.48" x2="22.86" y2="411.48" width="0.1524" layer="91"/> -<label x="22.86" y="411.48" size="1.778" layer="95"/> -</segment> -</net> -</nets> -</sheet> -</sheets> -</schematic> -</drawing> -<compatibility> -<note version="6.3" minversion="6.2.2" severity="warning"> -Since Version 6.2.2 text objects can contain more than one line, -which will not be processed correctly with this version. -</note> -<note version="8.2" severity="warning"> -Since Version 8.2, EAGLE supports online libraries. The ids -of those online libraries will not be understood (or retained) -with this version. -</note> -<note version="8.3" severity="warning"> -Since Version 8.3, EAGLE supports URNs for individual library -assets (packages, symbols, and devices). The URNs of those assets -will not be understood (or retained) with this version. -</note> -</compatibility> -</eagle> diff --git a/daughterboard_router.jpg b/daughterboard_router.jpg deleted file mode 100644 index 683d0449ba411857c5712113f89146540acdd8b9..0000000000000000000000000000000000000000 Binary files a/daughterboard_router.jpg and /dev/null differ diff --git a/routed.png b/routed.png deleted file mode 100644 index 242e869179be2a24123653fc8ef641056d4f1758..0000000000000000000000000000000000000000 Binary files a/routed.png and /dev/null differ diff --git a/daughterboard-router-squidrev/daughterboard-router-squidrev_2019-04-14.zip b/routerboard-atsamd51/daughterboard-router-squidrev_2019-04-14.zip similarity index 100% rename from daughterboard-router-squidrev/daughterboard-router-squidrev_2019-04-14.zip rename to routerboard-atsamd51/daughterboard-router-squidrev_2019-04-14.zip diff --git a/daughterboard-router-squidrev/daughterboard-router-squidrev_2019-05-04.zip b/routerboard-atsamd51/daughterboard-router-squidrev_2019-05-04.zip similarity index 100% rename from daughterboard-router-squidrev/daughterboard-router-squidrev_2019-05-04.zip rename to routerboard-atsamd51/daughterboard-router-squidrev_2019-05-04.zip diff --git a/routerboard-atsamd51/daughterboard-router-squidrev_2019-08-10_design.zip b/routerboard-atsamd51/daughterboard-router-squidrev_2019-08-10_design.zip new file mode 100644 index 0000000000000000000000000000000000000000..dce99421ab5e08d9c242e7fe1ee0782eff51dc45 Binary files /dev/null and b/routerboard-atsamd51/daughterboard-router-squidrev_2019-08-10_design.zip differ diff --git a/daughterboard-router-squidrev/eagle.epf b/routerboard-atsamd51/eagle.epf similarity index 78% rename from daughterboard-router-squidrev/eagle.epf rename to routerboard-atsamd51/eagle.epf index 62901f50e3471d0086d1852fde898fcc9b17b901..6fed9cf322ee1c9ca6db3f6119713beeed917859 100644 --- a/daughterboard-router-squidrev/eagle.epf +++ b/routerboard-atsamd51/eagle.epf @@ -1,33 +1,27 @@ [Eagle] -Version="09 02 02" +Version="09 05 00" Platform="Windows" Globals="Globals" Desktop="Desktop" [Globals] AutoSaveProject=1 -UsedLibraryUrn="urn:adsk.eagle:library:217" UsedLibraryUrn="urn:adsk.eagle:library:325" UsedLibraryUrn="urn:adsk.eagle:library:371" -UsedLibrary="D:/dropbox/CBA/doc/libraries/eagle/connector.lbr" -UsedLibrary="D:/dropbox/CBA/doc/libraries/eagle/power.lbr" -UsedLibrary="D:/dropbox/CBA/doc/libraries/eagle/passives.lbr" -UsedLibrary="D:/dropbox/CBA/doc/libraries_jake/eagle/sparkfun/SparkFun-Connectors.lbr" -UsedLibrary="D:/dropbox/CBA/doc/libraries/eagle/comm.lbr" -UsedLibrary="D:/dropbox/CBA/doc/libraries/eagle/sensor.lbr" +UsedLibraryUrn="urn:adsk.eagle:library:217" [Win_1] Type="Board Editor" -Number=4 -File="daughterboard-router-squidrev.brd" -View="23.8983 -23.7778 62.3412 25.7309" -WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.3048 0.2032 0.254 0.1524" +Number=1 +File="routerboard-atsamd51.brd" +View="35.9139 -10.4561 48.2442 -0.513888" +WireWidths=" 0.1016 0.127 0.15 0.2 0.2032 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.3048 0.0762 0.1524 0.254" PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6" ViaDiameters=" 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 0.95 1 1.05 1.1 1.15 1.2 1.3 0" -ViaDrills=" 0.2 0.25 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.3 0.35" +ViaDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35" HoleDrills=" 0.2 0.25 0.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1 0.35" -TextSizes=" 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778 1" +TextSizes=" 0.254 0.3048 0.4064 0.6096 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778 0.8128" PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27" PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0" @@ -62,9 +56,9 @@ Layer=1 [Win_2] Type="Schematic Editor" -Number=1 -File="daughterboard-router-squidrev.sch" -View="39.3433 319.055 144.226 443.178" +Number=2 +File="routerboard-atsamd51.sch" +View="129.813 185.831 276.738 326.182" WireWidths=" 0.0762 0.1016 0.127 0.15 0.2 0.2032 0.254 0.3048 0.4064 0.508 0.6096 0.8128 1.016 1.27 2.54 0.1524" PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0" PadDrills=" 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.65 0.7 0.75 0.8 0.85 0.9 1 0.6" @@ -102,8 +96,8 @@ SwapLevel=0 ArcDirection=0 AddLevel=2 PadsSameType=0 -Layer=91 -Views=" 1: 39.3433 319.055 144.226 443.178" +Layer=97 +Views=" 1: 129.813 185.831 276.738 326.182" Sheet="1" [Win_3] @@ -111,7 +105,7 @@ Type="Control Panel" Number=0 [Desktop] -Screen="3840 1080" +Screen="1920 1080" Window="Win_1" Window="Win_2" Window="Win_3" diff --git a/routerboard-atsamd51/routed.png b/routerboard-atsamd51/routed.png new file mode 100644 index 0000000000000000000000000000000000000000..da56caeb29e099110e0a8e7252d4b432e51fdbfd Binary files /dev/null and b/routerboard-atsamd51/routed.png differ diff --git a/routerboard-atsamd51/routerboard-atsamd51.brd b/routerboard-atsamd51/routerboard-atsamd51.brd new file mode 100644 index 0000000000000000000000000000000000000000..f40affb983423bcdf28222c06a6286c680618be9 --- /dev/null +++ b/routerboard-atsamd51/routerboard-atsamd51.brd @@ -0,0 +1,3281 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="9.2.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="1" unitdist="mm" unit="mm" style="lines" multiple="1" display="yes" altdistance="1" altunitdist="mm" altunit="mm"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="yes"/> +<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/> +<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/> +<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/> +<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/> +<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/> +<layer number="8" name="Route8" color="1" fill="2" visible="no" active="yes"/> +<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/> +<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/> +<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/> +<layer number="12" name="Route12" color="1" fill="5" visible="yes" active="yes"/> +<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/> +<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/> +<layer number="15" name="Route15" color="4" fill="6" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer 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Sollte ihre Platine +besondere Anforderungen haben, treffen Sie die erforderlichen +Einstellungen hier und speichern die Design Rules unter +einem neuen Namen ab.</description> +<description language="en"><b>EAGLE Design Rules</b> +<p> +The default Design Rules have been set to cover +a wide range of applications. Your particular design +may have different requirements, so please make the +necessary adjustments and save your customized +design rules under a new name.</description> +<param name="layerSetup" value="(1*2*15*16)"/> +<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/> +<param name="mtIsolate" value="0.3mm 0.3mm 0.3mm 0.15mm 0.2mm 0.15mm 0.2mm 0.3mm 0.2mm 0.15mm 0.2mm 0.3mm 0.2mm 0.15mm 0.2mm"/> +<param name="mdWireWire" value="6mil"/> +<param name="mdWirePad" value="6mil"/> +<param name="mdWireVia" value="6mil"/> +<param name="mdPadPad" value="6mil"/> +<param name="mdPadVia" value="6mil"/> +<param name="mdViaVia" value="6mil"/> +<param name="mdSmdPad" value="6mil"/> +<param name="mdSmdVia" value="0mil"/> +<param name="mdSmdSmd" value="6mil"/> +<param name="mdViaViaSameLayer" value="6mil"/> +<param name="mnLayersViaInSmd" value="2"/> +<param name="mdCopperDimension" value="6mil"/> +<param name="mdDrill" value="6mil"/> +<param name="mdSmdStop" value="0mil"/> +<param name="msWidth" value="6mil"/> +<param name="msDrill" value="0.2mm"/> +<param name="msMicroVia" value="9.99mm"/> +<param name="msBlindViaRatio" value="0.5"/> +<param name="rvPadTop" value="0.25"/> +<param name="rvPadInner" value="0.25"/> +<param name="rvPadBottom" value="0.25"/> +<param name="rvViaOuter" value="0.25"/> +<param name="rvViaInner" value="0.25"/> +<param name="rvMicroViaOuter" value="0.25"/> +<param name="rvMicroViaInner" value="0.25"/> +<param name="rlMinPadTop" value="10mil"/> +<param name="rlMaxPadTop" value="20mil"/> +<param name="rlMinPadInner" value="10mil"/> +<param name="rlMaxPadInner" value="20mil"/> +<param name="rlMinPadBottom" value="10mil"/> +<param name="rlMaxPadBottom" value="20mil"/> +<param name="rlMinViaOuter" value="8mil"/> +<param name="rlMaxViaOuter" value="20mil"/> +<param name="rlMinViaInner" value="8mil"/> +<param name="rlMaxViaInner" value="20mil"/> +<param name="rlMinMicroViaOuter" value="4mil"/> +<param name="rlMaxMicroViaOuter" value="20mil"/> +<param name="rlMinMicroViaInner" value="4mil"/> +<param name="rlMaxMicroViaInner" value="20mil"/> +<param name="psTop" value="-1"/> +<param name="psBottom" value="-1"/> +<param name="psFirst" value="-1"/> +<param name="psElongationLong" value="100"/> +<param name="psElongationOffset" value="100"/> +<param name="mvStopFrame" value="1"/> +<param name="mvCreamFrame" value="0"/> +<param name="mlMinStopFrame" value="4mil"/> +<param name="mlMaxStopFrame" value="4mil"/> +<param name="mlMinCreamFrame" value="0mil"/> +<param name="mlMaxCreamFrame" value="0mil"/> +<param name="mlViaStopLimit" value="25mil"/> +<param name="srRoundness" value="0"/> +<param name="srMinRoundness" value="0mil"/> +<param name="srMaxRoundness" value="0mil"/> +<param name="slThermalIsolate" value="10mil"/> +<param name="slThermalsForVias" value="0"/> +<param name="dpMaxLengthDifference" value="10mm"/> +<param name="dpGapFactor" value="2.5"/> +<param name="checkAngle" value="0"/> +<param name="checkFont" value="1"/> +<param name="checkRestrict" value="1"/> +<param name="checkStop" value="0"/> +<param name="checkValues" value="0"/> +<param name="checkNames" value="1"/> +<param name="checkWireStubs" value="1"/> +<param name="checkPolygonWidth" value="0"/> +<param name="useDiameter" value="13"/> +<param name="maxErrors" value="50"/> +</designrules> +<autorouter> +<pass name="Default"> +<param name="RoutingGrid" value="50mil"/> +<param name="AutoGrid" value="1"/> +<param name="Efforts" value="0"/> +<param name="TopRouterVariant" value="1"/> +<param name="tpViaShape" value="round"/> +<param name="PrefDir.1" value="a"/> +<param name="PrefDir.2" value="0"/> +<param name="PrefDir.3" value="0"/> +<param name="PrefDir.4" value="0"/> +<param name="PrefDir.5" value="0"/> +<param name="PrefDir.6" value="0"/> +<param name="PrefDir.7" value="0"/> +<param name="PrefDir.8" value="0"/> +<param name="PrefDir.9" value="0"/> +<param name="PrefDir.10" value="0"/> +<param name="PrefDir.11" value="0"/> +<param name="PrefDir.12" value="0"/> +<param name="PrefDir.13" value="0"/> +<param name="PrefDir.14" value="0"/> +<param name="PrefDir.15" value="0"/> +<param name="PrefDir.16" value="a"/> +<param name="cfVia" value="8"/> +<param name="cfNonPref" value="5"/> +<param name="cfChangeDir" value="2"/> +<param name="cfOrthStep" value="2"/> +<param name="cfDiagStep" value="3"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="1"/> +<param name="cfMalusStep" value="1"/> +<param name="cfPadImpact" value="4"/> +<param name="cfSmdImpact" value="4"/> +<param name="cfBusImpact" value="0"/> +<param name="cfHugging" value="3"/> +<param name="cfAvoid" value="4"/> +<param name="cfPolygon" value="10"/> +<param name="cfBase.1" value="0"/> +<param name="cfBase.2" value="1"/> +<param name="cfBase.3" value="1"/> +<param name="cfBase.4" value="1"/> +<param name="cfBase.5" value="1"/> +<param name="cfBase.6" value="1"/> +<param name="cfBase.7" value="1"/> +<param name="cfBase.8" value="1"/> +<param name="cfBase.9" value="1"/> +<param name="cfBase.10" value="1"/> +<param name="cfBase.11" value="1"/> +<param name="cfBase.12" value="1"/> +<param name="cfBase.13" value="1"/> +<param name="cfBase.14" value="1"/> +<param name="cfBase.15" value="1"/> +<param name="cfBase.16" value="0"/> +<param name="mnVias" value="20"/> +<param name="mnSegments" value="9999"/> +<param name="mnExtdSteps" value="9999"/> +<param name="mnRipupLevel" value="10"/> +<param name="mnRipupSteps" value="100"/> +<param name="mnRipupTotal" value="100"/> +</pass> +<pass name="Follow-me" refer="Default" active="yes"> +</pass> +<pass name="Busses" refer="Default" active="yes"> +<param name="cfNonPref" value="4"/> +<param name="cfBusImpact" value="4"/> +<param name="cfHugging" value="0"/> +<param name="mnVias" value="0"/> +</pass> +<pass name="Route" refer="Default" active="yes"> +</pass> +<pass name="Optimize1" refer="Default" active="yes"> +<param name="cfVia" value="99"/> +<param name="cfExtdStep" value="10"/> +<param name="cfHugging" value="1"/> +<param name="mnExtdSteps" value="1"/> +<param name="mnRipupLevel" value="0"/> +</pass> +<pass name="Optimize2" refer="Optimize1" active="yes"> +<param name="cfNonPref" value="0"/> +<param name="cfChangeDir" value="6"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="2"/> +<param name="cfMalusStep" value="2"/> +<param name="cfPadImpact" value="2"/> +<param name="cfSmdImpact" value="2"/> +<param name="cfHugging" value="0"/> +</pass> +<pass name="Optimize3" refer="Optimize2" active="yes"> +<param name="cfChangeDir" value="8"/> +<param name="cfPadImpact" value="0"/> +<param name="cfSmdImpact" value="0"/> +</pass> +<pass name="Optimize4" refer="Optimize3" active="yes"> +<param name="cfChangeDir" value="25"/> +</pass> +</autorouter> +<elements> +<element name="D3" library="lights" package="LED0805" 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ratio="10">>VALUE</text> +<rectangle x1="-5.334" y1="-0.762" x2="5.334" y2="0" layer="21"/> +<rectangle x1="-5.334" y1="-1.27" x2="-3.429" y2="-0.762" layer="21"/> +<rectangle x1="-3.429" y1="-1.27" x2="-1.651" y2="-0.762" layer="51"/> +<rectangle x1="3.429" y1="-1.27" x2="5.334" y2="-0.762" layer="21"/> +<rectangle x1="1.651" y1="-1.27" x2="3.429" y2="-0.762" layer="51"/> +<rectangle x1="-1.651" y1="-1.27" x2="1.651" y2="-0.762" layer="21"/> +</package> +</packages> +<symbols> +<symbol name="RESISTOR"> +<wire x1="-2.54" y1="0" x2="-2.159" y2="1.016" width="0.1524" layer="94"/> +<wire x1="-2.159" y1="1.016" x2="-1.524" y2="-1.016" width="0.1524" layer="94"/> +<wire x1="-1.524" y1="-1.016" x2="-0.889" y2="1.016" width="0.1524" layer="94"/> +<wire x1="-0.889" y1="1.016" x2="-0.254" y2="-1.016" width="0.1524" layer="94"/> +<wire x1="-0.254" y1="-1.016" x2="0.381" y2="1.016" width="0.1524" layer="94"/> +<wire x1="0.381" y1="1.016" x2="1.016" y2="-1.016" width="0.1524" layer="94"/> +<wire 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name="1206" package="1206"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="1206" constant="no"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="2010" package="R2010"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="2010"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="0805-RES" package="0805"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="0805"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="0603-RES" package="0603-RES"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="0603"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="0402-RES" package="0402-RES"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="0402"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="2512" package="R2512"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""> +<attribute name="PACKAGE" value="2512"/> +<attribute name="PRECISION" value="" constant="no"/> +</technology> +</technologies> +</device> +<device name="TO220ACS" package="TO220ACS"> +<connects> +<connect gate="G$1" pin="1" pad="A"/> +<connect gate="G$1" pin="2" pad="C"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="lights"> +<packages> +<package name="LED1206FAB"> +<description>LED1206 FAB style (smaller pads to allow trace between)</description> +<wire x1="-2.032" y1="1.016" x2="2.032" y2="1.016" width="0.127" layer="21"/> +<wire x1="2.032" y1="1.016" x2="2.032" y2="-1.016" width="0.127" layer="21"/> +<wire x1="2.032" y1="-1.016" x2="-2.032" y2="-1.016" width="0.127" layer="21"/> +<wire x1="-2.032" y1="-1.016" x2="-2.032" y2="1.016" width="0.127" layer="21"/> +<smd name="1" x="-1.651" y="0" dx="1.27" dy="1.905" layer="1"/> +<smd name="2" x="1.651" y="0" dx="1.27" dy="1.905" layer="1"/> +<text x="-1.778" y="1.27" size="1.016" layer="25" ratio="15">>NAME</text> +<text x="-1.778" y="-2.286" size="1.016" layer="27" ratio="15">>VALUE</text> +</package> +<package name="5MM"> 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x2="-0.9652" y2="0.8128" width="0.1524" layer="51"/> +<smd name="2" x="1.422" y="0" dx="1.6" dy="1.803" layer="1"/> +<smd name="1" x="-1.422" y="0" dx="1.6" dy="1.803" layer="1"/> +<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text> +<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text> +<rectangle x1="-1.6891" y1="-0.8763" x2="-0.9525" y2="0.8763" layer="51"/> +<rectangle x1="0.9525" y1="-0.8763" x2="1.6891" y2="0.8763" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="LED"> +<description>LED</description> +<wire x1="1.27" y1="2.54" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="2.54" width="0.254" layer="94"/> +<wire x1="1.27" y1="0" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="0" width="0.254" layer="94"/> +<wire x1="1.27" y1="2.54" x2="0" y2="2.54" width="0.254" layer="94"/> +<wire x1="0" y1="2.54" x2="-1.27" y2="2.54" width="0.254" layer="94"/> +<wire x1="0" y1="2.54" x2="0" y2="0" width="0.1524" layer="94"/> +<wire x1="-2.032" y1="1.778" x2="-3.429" y2="0.381" width="0.1524" layer="94"/> +<wire x1="-1.905" y1="0.635" x2="-3.302" y2="-0.762" width="0.1524" layer="94"/> +<text x="3.556" y="-2.032" size="1.778" layer="95" rot="R90">>NAME</text> +<text x="5.715" y="-2.032" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="C" x="0" y="-2.54" visible="off" length="short" direction="pas" rot="R90"/> +<pin name="A" x="0" y="5.08" visible="off" length="short" direction="pas" rot="R270"/> +<polygon width="0.1524" layer="94"> +<vertex x="-3.429" y="0.381"/> +<vertex x="-3.048" y="1.27"/> +<vertex x="-2.54" y="0.762"/> +</polygon> +<polygon width="0.1524" layer="94"> +<vertex x="-3.302" y="-0.762"/> +<vertex x="-2.921" y="0.127"/> +<vertex x="-2.413" y="-0.381"/> +</polygon> +</symbol> +</symbols> +<devicesets> +<deviceset name="LED" prefix="D"> +<description>LED</description> +<gates> +<gate name="G$1" symbol="LED" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LED1206"> +<connects> +<connect gate="G$1" pin="A" pad="1"/> +<connect gate="G$1" pin="C" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="FAB1206" package="LED1206FAB"> +<connects> +<connect gate="G$1" pin="A" pad="1"/> +<connect gate="G$1" pin="C" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="5MM" package="5MM"> +<connects> +<connect gate="G$1" pin="A" pad="IN"/> +<connect gate="G$1" pin="C" pad="OUT"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="0805" package="LED0805"> +<connects> +<connect gate="G$1" pin="A" pad="1"/> +<connect gate="G$1" pin="C" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="fab"> +<packages> +<package name="CBA-SILK-LOGO"> +<circle x="0" y="0" radius="0.254" width="0.127" layer="21"/> +<circle x="-0.762" y="0.762" radius="0.254" width="0.127" layer="21"/> +<wire x1="-0.254" y1="1.016" x2="0.254" y2="1.016" width="0.127" layer="21"/> +<wire x1="0.254" y1="1.016" x2="0.254" y2="0.508" width="0.127" layer="21"/> +<wire x1="0.254" y1="0.508" x2="-0.254" y2="0.508" width="0.127" layer="21"/> +<wire x1="-0.254" y1="0.508" x2="-0.254" y2="1.016" width="0.127" layer="21"/> +<wire x1="-1.016" y1="0.254" x2="-0.508" y2="0.254" width="0.127" layer="21"/> +<wire x1="-0.508" y1="0.254" x2="-0.508" y2="-0.254" width="0.127" layer="21"/> +<wire x1="-0.508" y1="-0.254" x2="-1.016" y2="-0.254" width="0.127" layer="21"/> +<wire x1="-1.016" y1="-0.254" x2="-1.016" y2="0.254" width="0.127" layer="21"/> +<wire x1="0.508" y1="0.508" x2="1.016" y2="0.508" width="0.127" layer="21"/> +<wire x1="1.016" y1="0.508" x2="1.016" y2="1.016" width="0.127" layer="21"/> +<wire x1="1.016" y1="1.016" x2="0.508" y2="1.016" width="0.127" layer="21"/> +<wire x1="0.508" y1="1.016" x2="0.508" y2="0.508" width="0.127" layer="21"/> +<wire x1="0.508" y1="0.254" x2="1.016" y2="0.254" width="0.127" layer="21"/> +<wire x1="1.016" y1="0.254" x2="1.016" y2="-0.254" width="0.127" layer="21"/> +<wire x1="1.016" y1="-0.254" x2="0.508" y2="-0.254" width="0.127" layer="21"/> +<wire x1="0.508" y1="-0.254" x2="0.508" y2="0.254" width="0.127" layer="21"/> +<wire x1="0.508" y1="-0.508" x2="1.016" y2="-0.508" width="0.127" layer="21"/> +<wire x1="1.016" y1="-0.508" x2="1.016" y2="-1.016" width="0.127" layer="21"/> +<wire x1="1.016" y1="-1.016" x2="0.508" y2="-1.016" width="0.127" layer="21"/> +<wire x1="0.508" y1="-1.016" x2="0.508" y2="-0.508" width="0.127" layer="21"/> +<wire x1="0.254" y1="-0.508" x2="-0.254" y2="-0.508" width="0.127" layer="21"/> +<wire x1="-0.254" y1="-0.508" x2="-0.254" y2="-1.016" width="0.127" layer="21"/> +<wire x1="-0.254" y1="-1.016" x2="0.254" y2="-1.016" width="0.127" layer="21"/> +<wire x1="0.254" y1="-1.016" x2="0.254" y2="-0.508" width="0.127" layer="21"/> +<wire x1="-0.508" y1="-0.508" x2="-1.016" y2="-0.508" width="0.127" layer="21"/> +<wire x1="-1.016" y1="-0.508" x2="-1.016" y2="-1.016" width="0.127" layer="21"/> +<wire x1="-1.016" y1="-1.016" x2="-0.508" y2="-1.016" width="0.127" layer="21"/> +<wire x1="-0.508" y1="-1.016" x2="-0.508" y2="-0.508" width="0.127" layer="21"/> +</package> +<package name="MK-LOGO-SILK"> +<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.127" layer="21"/> +<wire x1="-1.27" y1="-1.27" x2="1.27" y2="-1.27" width="0.127" layer="21"/> +<wire x1="1.27" y1="-1.27" x2="1.27" y2="1.27" width="0.127" layer="21"/> +<wire x1="1.27" y1="1.27" x2="-1.27" y2="1.27" width="0.127" layer="21"/> +<wire x1="-0.9525" y1="-1.016" x2="-0.9525" y2="1.016" width="0.127" layer="21"/> +<wire x1="-0.5715" y1="0" x2="-0.9525" y2="1.016" width="0.127" layer="21"/> +<wire x1="-0.1905" y1="1.016" x2="-0.1905" y2="-1.016" width="0.127" layer="21"/> +<wire x1="0.1905" y1="-1.016" x2="0.1905" y2="0" width="0.127" layer="21"/> +<wire x1="0.1905" y1="0" x2="0.1905" y2="1.016" width="0.127" layer="21"/> +<wire x1="0.1905" y1="0" x2="0.9525" y2="1.016" width="0.127" layer="21"/> +<wire x1="0.1905" y1="0" x2="0.9525" y2="-1.016" width="0.127" layer="21"/> +<wire x1="-0.5715" y1="0" x2="-0.1905" y2="1.016" width="0.127" layer="21"/> +</package> +</packages> +<symbols> +</symbols> +<devicesets> +<deviceset name="CBA-LOGO"> +<gates> +</gates> +<devices> +<device name="" package="CBA-SILK-LOGO"> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="MK-LOGO"> +<gates> +</gates> +<devices> +<device name="" package="MK-LOGO-SILK"> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="supply1" urn="urn:adsk.eagle:library:371"> +<description><b>Supply Symbols</b><p> + GND, VCC, 0V, +5V, -5V, etc.<p> + Please keep in mind, that these devices are necessary for the + automatic wiring of the supply signals.<p> + The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> + In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> + <author>Created by librarian@cadsoft.de</author></description> +<packages> +</packages> +<symbols> +<symbol name="+3V3" urn="urn:adsk.eagle:symbol:26950/1" library_version="1"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="+3V3" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +</symbol> +<symbol name="GND" urn="urn:adsk.eagle:symbol:26925/1" library_version="1"> +<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> +<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> +</symbol> +<symbol name="+5V" urn="urn:adsk.eagle:symbol:26929/1" library_version="1"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<text x="-2.54" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="+5V" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="+3V3" urn="urn:adsk.eagle:component:26981/1" prefix="+3V3" library_version="1"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="G$1" symbol="+3V3" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="GND" urn="urn:adsk.eagle:component:26954/1" prefix="GND" library_version="1"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="+5V" urn="urn:adsk.eagle:component:26963/1" prefix="P+" library_version="1"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="+5V" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="power"> +<packages> +<package name="SOT23-5"> +<description><b>Small Outline Transistor</b>, 5 lead</description> +<wire x1="-1.544" y1="0.713" x2="1.544" y2="0.713" width="0.1524" layer="51"/> +<wire x1="1.544" y1="0.713" x2="1.544" y2="-0.712" width="0.1524" layer="51"/> +<wire x1="1.544" y1="-0.712" x2="-1.544" y2="-0.712" width="0.1524" layer="51"/> +<wire x1="-1.544" y1="-0.712" x2="-1.544" y2="0.713" width="0.1524" layer="51"/> +<smd name="5" x="-0.95" y="1.306" dx="0.5334" dy="1.1938" layer="1"/> +<smd name="4" x="0.95" y="1.306" dx="0.5334" dy="1.1938" layer="1"/> +<smd name="1" x="-0.95" y="-1.306" dx="0.5334" dy="1.1938" layer="1"/> +<smd name="2" x="0" y="-1.306" dx="0.5334" dy="1.1938" layer="1"/> +<smd name="3" x="0.95" y="-1.306" dx="0.5334" dy="1.1938" layer="1"/> +<text x="-1.778" y="-1.778" size="1.27" layer="25" ratio="10" rot="R90">>NAME</text> +<text x="3.048" y="-1.778" size="1.27" layer="27" ratio="10" rot="R90">>VALUE</text> +<rectangle x1="-1.1875" y1="0.7126" x2="-0.7125" y2="1.5439" layer="51"/> +<rectangle x1="0.7125" y1="0.7126" x2="1.1875" y2="1.5439" layer="51"/> +<rectangle x1="-1.1875" y1="-1.5437" x2="-0.7125" y2="-0.7124" layer="51"/> +<rectangle x1="-0.2375" y1="-1.5437" x2="0.2375" y2="-0.7124" layer="51"/> +<rectangle x1="0.7125" y1="-1.5437" x2="1.1875" y2="-0.7124" layer="51"/> +<wire x1="-1.5" y1="-1.9" x2="-1.5" y2="-1.2" width="0.127" layer="21"/> +</package> +</packages> +<symbols> +<symbol name="VREG-AP2112"> +<pin name="VIN" x="-12.7" y="2.54" length="middle"/> +<pin name="EN" x="-12.7" y="-2.54" length="middle"/> +<pin name="GND" x="0" y="-10.16" length="middle" rot="R90"/> +<pin name="VOUT" x="12.7" y="2.54" length="middle" rot="R180"/> +<wire x1="-7.62" y1="5.08" x2="-7.62" y2="-5.08" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-5.08" x2="7.62" y2="-5.08" width="0.254" layer="94"/> +<wire x1="7.62" y1="-5.08" x2="7.62" y2="5.08" width="0.254" layer="94"/> +<wire x1="7.62" y1="5.08" x2="-7.62" y2="5.08" width="0.254" layer="94"/> +<text x="-2.54" y="7.62" size="1.27" layer="95">>NAME</text> +<text x="2.54" y="-7.62" size="1.27" layer="96">>VALUE</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="VREG-AP2112" prefix="U"> +<gates> +<gate name="G$1" symbol="VREG-AP2112" x="0" y="0"/> +</gates> +<devices> +<device name="" package="SOT23-5"> +<connects> +<connect gate="G$1" pin="EN" pad="3"/> +<connect gate="G$1" pin="GND" pad="2"/> +<connect gate="G$1" pin="VIN" pad="1"/> +<connect gate="G$1" pin="VOUT" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="microcontrollers"> +<packages> +<package name="QFN-64-9X9MM-SMALLPAD"> +<description><h3>64-pin QFN 9x9mm, 0.5mm pitch</h3> +<p>Package used by ATmega128RFA1</p> +<p><a href="http://www.atmel.com/Images/Atmel-8266-MCU_Wireless-ATmega128RFA1_Datasheet.pdf">Example Datasheet</a></p></description> +<wire x1="-4.492" y1="-4.5" x2="4.508" y2="-4.5" width="0.09" layer="51"/> +<wire x1="4.508" y1="-4.5" x2="4.508" y2="4.5" width="0.09" layer="51"/> +<wire x1="4.508" y1="4.5" x2="-4.492" y2="4.5" width="0.09" layer="51"/> +<wire x1="-4.492" y1="4.5" x2="-4.492" y2="-4.5" width="0.09" layer="51"/> +<wire x1="-4.6" y1="4.6" x2="-4.6" y2="4.1" width="0.2032" layer="21"/> +<wire x1="-4.6" y1="4.6" x2="-4.1" y2="4.6" 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+<text x="0" y="1.27" size="0.6096" layer="25" font="vector" ratio="20" align="bottom-center">>NAME</text> +<text x="0" y="-1.27" size="0.6096" layer="27" font="vector" ratio="20" align="top-center">>VALUE</text> +<wire x1="4.6" y1="-4.6" x2="4.1" y2="-4.6" width="0.2032" layer="21"/> +<wire x1="4.6" y1="-4.6" x2="4.6" y2="-4.1" width="0.2032" layer="21"/> +<wire x1="-4.6" y1="-4.6" x2="-4.6" y2="-4.1" width="0.2032" layer="21"/> +<wire x1="-4.6" y1="-4.6" x2="-4.1" y2="-4.6" width="0.2032" layer="21"/> +<smd name="P$1" x="0" y="0" dx="4.8" dy="4.8" layer="1" cream="no"/> +<polygon width="0.127" layer="31"> +<vertex x="1.03" y="1.03"/> +<vertex x="1.03" y="2.17"/> +<vertex x="2.17" y="2.17"/> +<vertex x="2.17" y="1.03"/> +</polygon> +<polygon width="0.127" layer="31"> +<vertex x="-2.17" y="1.03"/> +<vertex x="-2.17" y="2.17"/> +<vertex x="-1.03" y="2.17"/> +<vertex x="-1.03" y="1.03"/> +</polygon> +<polygon width="0.127" layer="31"> +<vertex x="-2.17" y="-2.17"/> +<vertex x="-2.17" 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Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<text x="-1.27" y="-2.54" size="1.27" layer="25" rot="R90">>name</text> +<hole x="0" y="0" drill="0.889"/> +<hole x="5.08" y="-1.016" drill="0.889"/> +<hole x="5.08" y="1.016" drill="0.889"/> +<hole x="0" y="2.54" drill="2.3748"/> +<hole x="0" y="-2.54" drill="2.3748"/> +<hole x="3.175" y="-2.54" drill="2.3748"/> +<hole x="3.175" y="2.54" drill="2.3748"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +</package> +<package name="TC2030-MCP-NL"> +<description><B>TAG-CONNECT ICSP Connector</B><BR><I>Manufacturer:</I> <a href="www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others.<BR> + +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" x="2.54" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="6" x="3.81" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="5" x="3.81" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="3" x="2.54" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="1" x="1.27" y="-0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<hole x="0" y="0" drill="0.889"/> +<hole x="5.08" y="-1.016" drill="0.889"/> +<hole x="5.08" y="1.016" drill="0.889"/> +<polygon width="0.0254" layer="39"> +<vertex x="1.27" y="-0.2413"/> +<vertex x="1.6637" y="-0.2413"/> +<vertex x="1.6637" y="-0.635"/> +<vertex x="2.1463" y="-0.635"/> +<vertex x="2.1463" y="-0.2413"/> +<vertex x="2.9337" y="-0.2413"/> +<vertex x="2.9337" y="-0.635"/> +<vertex x="3.4163" y="-0.635"/> +<vertex x="3.4163" y="-0.2413"/> +<vertex x="3.81" y="-0.2413"/> +<vertex x="3.81" y="0.2413"/> +<vertex x="3.4163" y="0.2413"/> +<vertex x="3.4163" y="0.635"/> +<vertex x="2.9337" y="0.635"/> +<vertex x="2.9337" y="0.2413"/> +<vertex x="2.1463" y="0.2413"/> +<vertex x="2.1463" y="0.635"/> +<vertex x="1.6637" y="0.635"/> +<vertex x="1.6637" y="0.2413"/> +<vertex x="1.27" y="0.2413"/> +</polygon> +<wire x1="-2.3" y1="2.9" x2="-2.3" y2="-2.9" width="0.127" layer="51"/> +<wire x1="-2.3" y1="-2.9" x2="7.5" y2="-2.9" width="0.127" layer="51"/> +<wire x1="7.5" y1="-2.9" x2="7.5" y2="2.9" width="0.127" layer="51"/> +<wire x1="7.5" y1="2.9" x2="-2.3" y2="2.9" width="0.127" layer="51"/> +</package> +<package name="TC2030-MCP-NL-CP"> +<description><B>TAG-CONNECT ICSP Connector</B><I>- with optional copper pads for steel alignment pins</I><BR><I>Manufacturer:</I> <a href="http://www.tag-connect.com">Tag-Connect</a><BR> +<BR>Cable for easy In-Circuit Serial Programming. Designed for Microchip ICD2, suitable for many others. +<p> +<b>NOTE:</b> Eagle's default spacing for drill holes does not leave sufficent room for routing traces for this footprint and should be adjusted. <br> +This setting can be found in the board layout editor under the Edit menu. Select "Design Rules" and then the Distance tab. 8 mils for Drill/Hole works well. +<br> +<TABLE cellspacing=0 cellpadding=0 border=0> +<TR><TD width=20></TD><TD> +<TABLE cellspacing=0 cellpadding=1 border=1> +<TR bgcolor=silver><TD align=center>PAD</TD><TD align=center>Description</TD></TR> +<TR><TD align=center>1</TD><TD>MCLR/Vpp</TD></TR> +<TR><TD align=center>2</TD><TD>Vdd</TD></TR> +<TR><TD align=center>3</TD><TD>GND</TD></TR> +<TR><TD align=center>4</TD><TD>PGD (ISPDAT)</TD></TR> +<TR><TD align=center>5</TD><TD>PGC (ISPCLK)</TD></TR> +<TR><TD align=center>6</TD><TD>nc (used for LVP)</TD></TR> +</TABLE> +</TD></TR></TABLE><BR><BR> + +<B>Note:</B> Suitable Receptacle pins are 0295-0-15-xx-06-xx-10-0 series from <a href="www.mill-max.com">Mill-Max</a><BR><BR> + +©2009 ROFA.cz - modified and updated by Robert Darlington &#8249;rdarlington@gmail.com&#8250;</description> +<smd name="2" x="1.27" y="0.635" dx="0.7874" dy="0.7874" layer="1" roundness="100" cream="no"/> +<smd name="4" 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length="short" rot="R270"/> +<pin name="D-" x="2.54" y="5.08" visible="pad" length="short" rot="R270"/> +<pin name="VBUS" x="0" y="5.08" visible="pad" length="short" rot="R270"/> +<pin name="GND" x="-2.54" y="5.08" visible="pad" length="short" rot="R270"/> +</symbol> +<symbol name="SJFAB"> +<wire x1="0.381" y1="0.635" x2="0.381" y2="-0.635" width="1.27" layer="94" curve="-180" cap="flat"/> +<wire x1="-0.381" y1="-0.635" x2="-0.381" y2="0.635" width="1.27" layer="94" curve="-180" cap="flat"/> +<wire x1="2.54" y1="0" x2="1.651" y2="0" width="0.1524" layer="94"/> +<wire x1="-2.54" y1="0" x2="-1.651" y2="0" width="0.1524" layer="94"/> +<text x="-2.54" y="2.54" size="1.778" layer="95">>NAME</text> +<text x="-2.54" y="-3.81" size="1.778" layer="96">>VALUE</text> +<pin name="2" x="5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1" rot="R180"/> +<pin name="1" x="-5.08" y="0" visible="pad" length="short" direction="pas" swaplevel="1"/> +</symbol> +<symbol name="TOMBSTONE"> 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pin="2"/> +</segment> +<segment> +<pinref part="X1" gate="G$1" pin="GND"/> +<pinref part="GND12" gate="1" pin="GND"/> +<wire x1="149.86" y1="358.14" x2="165.1" y2="358.14" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="GND3" gate="1" pin="GND"/> +<wire x1="96.52" y1="157.48" x2="96.52" y2="165.1" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="GND"/> +<wire x1="96.52" y1="165.1" x2="104.14" y2="165.1" width="0.1524" layer="91"/> +<pinref part="C4" gate="G$1" pin="2"/> +<wire x1="78.74" y1="167.64" x2="78.74" y2="165.1" width="0.1524" layer="91"/> +<wire x1="78.74" y1="165.1" x2="96.52" y2="165.1" width="0.1524" layer="91"/> +<junction x="96.52" y="165.1"/> +<pinref part="S1" gate="G$1" pin="P1"/> +<wire x1="71.12" y1="165.1" x2="78.74" y2="165.1" width="0.1524" layer="91"/> +<junction x="78.74" y="165.1"/> +</segment> +<segment> +<pinref part="C2" gate="G$1" pin="2"/> +<pinref part="GND9" gate="1" pin="GND"/> +<wire x1="78.74" y1="243.84" x2="78.74" y2="241.3" width="0.1524" layer="91"/> +<wire x1="78.74" y1="241.3" x2="78.74" y2="236.22" width="0.1524" layer="91"/> +<wire x1="78.74" y1="241.3" x2="91.44" y2="241.3" width="0.1524" layer="91"/> +<junction x="78.74" y="241.3"/> +<pinref part="C1" gate="G$1" pin="2"/> +<wire x1="91.44" y1="241.3" x2="91.44" y2="243.84" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="C5" gate="G$1" pin="2"/> +<wire x1="78.74" y1="289.56" x2="78.74" y2="287.02" width="0.1524" layer="91"/> +<pinref part="C6" gate="G$1" pin="2"/> +<wire x1="66.04" y1="289.56" x2="66.04" y2="287.02" width="0.1524" layer="91"/> +<wire x1="78.74" y1="287.02" x2="66.04" y2="287.02" width="0.1524" layer="91"/> +<pinref part="C7" gate="G$1" pin="2"/> +<wire x1="53.34" y1="289.56" x2="53.34" y2="287.02" width="0.1524" layer="91"/> +<wire x1="66.04" y1="287.02" x2="53.34" y2="287.02" width="0.1524" layer="91"/> +<junction x="66.04" y="287.02"/> +<pinref part="C8" gate="G$1" pin="2"/> +<wire x1="40.64" y1="289.56" x2="40.64" y2="287.02" width="0.1524" layer="91"/> +<wire x1="53.34" y1="287.02" x2="40.64" y2="287.02" width="0.1524" layer="91"/> +<junction x="53.34" y="287.02"/> +<pinref part="GND2" gate="1" pin="GND"/> +<wire x1="40.64" y1="281.94" x2="40.64" y2="287.02" width="0.1524" layer="91"/> +<junction x="40.64" y="287.02"/> +<wire x1="78.74" y1="287.02" x2="91.44" y2="287.02" width="0.1524" layer="91"/> +<junction x="78.74" y="287.02"/> +<pinref part="C17" gate="G$1" pin="2"/> +<wire x1="91.44" y1="287.02" x2="91.44" y2="289.56" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="U$1" gate="G$1" pin="GND"/> +<pinref part="GND8" gate="1" pin="GND"/> +<wire x1="322.58" y1="88.9" x2="327.66" y2="88.9" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="88.9" x2="342.9" y2="88.9" width="0.1524" layer="91"/> +<wire x1="342.9" y1="88.9" x2="347.98" y2="88.9" width="0.1524" layer="91"/> +<wire x1="347.98" y1="76.2" x2="342.9" y2="76.2" width="0.1524" layer="91"/> +<wire x1="342.9" y1="76.2" x2="342.9" y2="88.9" width="0.1524" layer="91"/> +<junction x="342.9" y="88.9"/> +<pinref part="C15" gate="G$1" pin="2"/> +<junction x="327.66" y="88.9"/> +</segment> +<segment> +<pinref part="U$2" gate="G$1" pin="GND"/> +<pinref part="GND10" gate="1" pin="GND"/> +<wire x1="322.58" y1="292.1" x2="327.66" y2="292.1" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="292.1" x2="342.9" y2="292.1" width="0.1524" layer="91"/> +<wire x1="342.9" y1="292.1" x2="347.98" y2="292.1" width="0.1524" layer="91"/> +<wire x1="347.98" y1="279.4" x2="342.9" y2="279.4" width="0.1524" layer="91"/> +<wire x1="342.9" y1="279.4" x2="342.9" y2="292.1" width="0.1524" layer="91"/> +<junction x="342.9" y="292.1"/> +<pinref part="C16" gate="G$1" pin="2"/> +<junction x="327.66" y="292.1"/> +</segment> +<segment> +<pinref part="R8" gate="G$1" pin="2"/> +<pinref part="GND11" gate="1" pin="GND"/> +<wire x1="241.3" y1="238.76" x2="248.92" y2="238.76" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="J6" gate="G$1" pin="GND"/> +<wire x1="25.4" y1="193.04" x2="7.62" y2="193.04" width="0.1524" layer="91"/> +<wire x1="7.62" y1="193.04" x2="7.62" y2="182.88" width="0.1524" layer="91"/> +<pinref part="GND13" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C10" gate="G$1" pin="2"/> +<wire x1="236.22" y1="299.72" x2="238.76" y2="299.72" width="0.1524" layer="91"/> +<wire x1="238.76" y1="299.72" x2="238.76" y2="297.18" width="0.1524" layer="91"/> +<pinref part="C11" gate="G$1" pin="1"/> +<wire x1="238.76" y1="297.18" x2="238.76" y2="294.64" width="0.1524" layer="91"/> +<wire x1="238.76" y1="294.64" x2="236.22" y2="294.64" width="0.1524" layer="91"/> +<pinref part="GND1" gate="1" pin="GND"/> +<junction x="238.76" y="297.18"/> +</segment> +<segment> +<pinref part="C12" gate="G$1" pin="2"/> +<wire x1="236.22" y1="264.16" x2="238.76" y2="264.16" width="0.1524" layer="91"/> +<wire x1="238.76" y1="264.16" x2="238.76" y2="261.62" width="0.1524" layer="91"/> +<pinref part="C14" gate="G$1" pin="1"/> +<wire x1="238.76" y1="261.62" x2="238.76" y2="259.08" width="0.1524" layer="91"/> +<wire x1="238.76" y1="259.08" x2="236.22" y2="259.08" width="0.1524" layer="91"/> +<pinref part="GND4" gate="1" pin="GND"/> +<junction x="238.76" y="261.62"/> +<pinref part="Y1" gate="G$1" pin="GND"/> +<wire x1="228.6" y1="261.62" x2="238.76" y2="261.62" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="U$6" gate="G$1" pin="GND"/> +<pinref part="GND7" gate="1" pin="GND"/> +<wire x1="322.58" y1="241.3" x2="327.66" y2="241.3" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="241.3" x2="342.9" y2="241.3" width="0.1524" layer="91"/> +<wire x1="342.9" y1="241.3" x2="347.98" y2="241.3" width="0.1524" layer="91"/> +<wire x1="347.98" y1="228.6" x2="342.9" y2="228.6" width="0.1524" layer="91"/> +<wire x1="342.9" y1="228.6" x2="342.9" y2="241.3" width="0.1524" layer="91"/> +<junction x="342.9" y="241.3"/> +<pinref part="C18" gate="G$1" pin="2"/> +<junction x="327.66" y="241.3"/> +</segment> +<segment> +<pinref part="U$8" gate="G$1" pin="GND"/> +<pinref part="GND20" gate="1" pin="GND"/> +<wire x1="322.58" y1="190.5" x2="327.66" y2="190.5" width="0.1524" layer="91"/> +<pinref part="U$8" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="190.5" x2="342.9" y2="190.5" width="0.1524" layer="91"/> +<wire x1="342.9" y1="190.5" x2="347.98" y2="190.5" width="0.1524" layer="91"/> +<wire x1="347.98" y1="177.8" x2="342.9" y2="177.8" width="0.1524" layer="91"/> +<wire x1="342.9" y1="177.8" x2="342.9" y2="190.5" width="0.1524" layer="91"/> +<junction x="342.9" y="190.5"/> +<pinref part="C19" gate="G$1" pin="2"/> +<junction x="327.66" y="190.5"/> +</segment> +<segment> +<pinref part="U$10" gate="G$1" pin="GND"/> +<pinref part="GND23" gate="1" pin="GND"/> +<wire x1="322.58" y1="139.7" x2="327.66" y2="139.7" width="0.1524" layer="91"/> +<pinref part="U$10" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="139.7" x2="342.9" y2="139.7" width="0.1524" layer="91"/> +<wire x1="342.9" y1="139.7" x2="347.98" y2="139.7" width="0.1524" layer="91"/> +<wire x1="347.98" y1="127" x2="342.9" y2="127" width="0.1524" layer="91"/> +<wire x1="342.9" y1="127" x2="342.9" y2="139.7" width="0.1524" layer="91"/> +<junction x="342.9" y="139.7"/> +<pinref part="C20" gate="G$1" pin="2"/> +<junction x="327.66" y="139.7"/> +</segment> +<segment> +<pinref part="U$12" gate="G$1" pin="GND"/> +<pinref part="GND26" gate="1" pin="GND"/> +<wire x1="322.58" y1="38.1" x2="327.66" y2="38.1" width="0.1524" layer="91"/> +<pinref part="U$12" gate="G$1" pin="!RE!"/> +<wire x1="327.66" y1="38.1" x2="342.9" y2="38.1" width="0.1524" layer="91"/> +<wire x1="342.9" y1="38.1" x2="347.98" y2="38.1" width="0.1524" layer="91"/> +<wire x1="347.98" y1="25.4" x2="342.9" y2="25.4" width="0.1524" layer="91"/> +<wire x1="342.9" y1="25.4" x2="342.9" y2="38.1" width="0.1524" layer="91"/> +<junction x="342.9" y="38.1"/> +<pinref part="C21" gate="G$1" pin="2"/> +<junction x="327.66" y="38.1"/> +</segment> +</net> +<net name="+3V3" class="0"> +<segment> +<pinref part="D1" gate="G$1" pin="A"/> +<wire x1="195.58" y1="396.24" x2="205.74" y2="396.24" width="0.1524" layer="91"/> +<wire x1="205.74" y1="396.24" x2="205.74" y2="386.08" width="0.1524" layer="91"/> +<wire x1="205.74" y1="386.08" x2="205.74" y2="381" width="0.1524" layer="91"/> +<wire x1="205.74" y1="381" x2="205.74" y2="375.92" width="0.1524" layer="91"/> +<pinref part="D3" gate="G$1" pin="A"/> +<wire x1="195.58" y1="375.92" x2="205.74" y2="375.92" width="0.1524" layer="91"/> +<pinref part="D2" gate="G$1" pin="A"/> +<wire x1="195.58" y1="386.08" x2="205.74" y2="386.08" width="0.1524" layer="91"/> +<junction x="205.74" y="386.08"/> +<wire x1="205.74" y1="381" x2="220.98" y2="381" width="0.1524" layer="91"/> +<junction x="205.74" y="381"/> +<pinref part="+3V33" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="U3" gate="G$1" pin="VOUT"/> +<pinref part="+3V34" gate="G$1" pin="+3V3"/> +<wire x1="190.5" y1="337.82" x2="193.04" y2="337.82" width="0.1524" layer="91"/> +<pinref part="C13" gate="G$1" pin="1"/> +<junction x="193.04" y="337.82"/> +<wire x1="193.04" y1="337.82" x2="205.74" y2="337.82" width="0.1524" layer="91"/> +<pinref part="C3" gate="G$1" pin="1"/> +<wire x1="205.74" y1="337.82" x2="220.98" y2="337.82" width="0.1524" layer="91"/> +<junction x="205.74" y="337.82"/> +</segment> +<segment> +<pinref part="+3V2" gate="G$1" pin="+3V3"/> +<pinref part="R6" gate="G$1" pin="2"/> +<wire x1="78.74" y1="213.36" x2="78.74" y2="208.28" width="0.1524" layer="91"/> +<pinref part="R7" gate="G$1" pin="2"/> +<wire x1="78.74" y1="208.28" x2="78.74" y2="195.58" width="0.1524" layer="91"/> +<wire x1="71.12" y1="205.74" x2="71.12" y2="208.28" width="0.1524" layer="91"/> +<wire x1="71.12" y1="208.28" x2="78.74" y2="208.28" width="0.1524" layer="91"/> +<junction x="78.74" y="208.28"/> +</segment> +<segment> +<pinref part="+3V3" gate="G$1" pin="+3V3"/> +<pinref part="U5" gate="G$1" pin="VDDIO"/> +<wire x1="33.02" y1="297.18" x2="40.64" y2="297.18" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="VDDANA"/> +<wire x1="40.64" y1="297.18" x2="53.34" y2="297.18" width="0.1524" layer="91"/> +<wire x1="53.34" y1="297.18" x2="66.04" y2="297.18" width="0.1524" layer="91"/> +<wire x1="66.04" y1="297.18" x2="78.74" y2="297.18" width="0.1524" layer="91"/> +<wire x1="78.74" y1="297.18" x2="91.44" y2="297.18" width="0.1524" layer="91"/> +<wire x1="91.44" y1="297.18" x2="101.6" y2="297.18" width="0.1524" layer="91"/> +<wire x1="101.6" y1="297.18" x2="104.14" y2="297.18" width="0.1524" layer="91"/> +<wire x1="104.14" y1="281.94" x2="101.6" y2="281.94" width="0.1524" layer="91"/> +<wire x1="101.6" y1="281.94" x2="101.6" y2="297.18" width="0.1524" layer="91"/> +<junction x="101.6" y="297.18"/> +<pinref part="C5" gate="G$1" pin="1"/> +<junction x="78.74" y="297.18"/> +<pinref part="C6" gate="G$1" pin="1"/> +<junction x="66.04" y="297.18"/> +<pinref part="C7" gate="G$1" pin="1"/> +<junction x="53.34" y="297.18"/> +<pinref part="C8" gate="G$1" pin="1"/> +<junction x="40.64" y="297.18"/> +<pinref part="C17" gate="G$1" pin="1"/> +<junction x="91.44" y="297.18"/> +</segment> +<segment> +<pinref part="U$1" gate="G$1" pin="VCC"/> +<pinref part="+3V5" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="96.52" x2="327.66" y2="96.52" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="96.52" x2="340.36" y2="96.52" width="0.1524" layer="91"/> +<wire x1="340.36" y1="96.52" x2="345.44" y2="96.52" width="0.1524" layer="91"/> +<wire x1="345.44" y1="96.52" x2="347.98" y2="96.52" width="0.1524" layer="91"/> +<wire x1="347.98" y1="81.28" x2="345.44" y2="81.28" width="0.1524" layer="91"/> +<wire x1="345.44" y1="81.28" x2="345.44" y2="96.52" width="0.1524" layer="91"/> +<junction x="345.44" y="96.52"/> +<pinref part="U$1" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="63.5" x2="340.36" y2="63.5" width="0.1524" layer="91"/> +<wire x1="340.36" y1="63.5" x2="340.36" y2="96.52" width="0.1524" layer="91"/> +<junction x="340.36" y="96.52"/> +<pinref part="C15" gate="G$1" pin="1"/> +<junction x="327.66" y="96.52"/> +</segment> +<segment> +<pinref part="U$2" gate="G$1" pin="VCC"/> +<pinref part="+3V6" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="299.72" x2="327.66" y2="299.72" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="299.72" x2="340.36" y2="299.72" width="0.1524" layer="91"/> +<wire x1="340.36" y1="299.72" x2="345.44" y2="299.72" width="0.1524" layer="91"/> +<wire x1="345.44" y1="299.72" x2="347.98" y2="299.72" width="0.1524" layer="91"/> +<wire x1="347.98" y1="284.48" x2="345.44" y2="284.48" width="0.1524" layer="91"/> +<wire x1="345.44" y1="284.48" x2="345.44" y2="299.72" width="0.1524" layer="91"/> +<junction x="345.44" y="299.72"/> +<pinref part="U$2" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="266.7" x2="340.36" y2="266.7" width="0.1524" layer="91"/> +<wire x1="340.36" y1="266.7" x2="340.36" y2="299.72" width="0.1524" layer="91"/> +<junction x="340.36" y="299.72"/> +<pinref part="C16" gate="G$1" pin="1"/> +<junction x="327.66" y="299.72"/> +</segment> +<segment> +<pinref part="J6" gate="G$1" pin="VDD"/> +<wire x1="25.4" y1="198.12" x2="7.62" y2="198.12" width="0.1524" layer="91"/> +<wire x1="7.62" y1="198.12" x2="7.62" y2="203.2" width="0.1524" layer="91"/> +<pinref part="+3V7" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="U$6" gate="G$1" pin="VCC"/> +<pinref part="+3V1" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="248.92" x2="327.66" y2="248.92" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="248.92" x2="340.36" y2="248.92" width="0.1524" layer="91"/> +<wire x1="340.36" y1="248.92" x2="345.44" y2="248.92" width="0.1524" layer="91"/> +<wire x1="345.44" y1="248.92" x2="347.98" y2="248.92" width="0.1524" layer="91"/> +<wire x1="347.98" y1="233.68" x2="345.44" y2="233.68" width="0.1524" layer="91"/> +<wire x1="345.44" y1="233.68" x2="345.44" y2="248.92" width="0.1524" layer="91"/> +<junction x="345.44" y="248.92"/> +<pinref part="U$6" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="215.9" x2="340.36" y2="215.9" width="0.1524" layer="91"/> +<wire x1="340.36" y1="215.9" x2="340.36" y2="248.92" width="0.1524" layer="91"/> +<junction x="340.36" y="248.92"/> +<pinref part="C18" gate="G$1" pin="1"/> +<junction x="327.66" y="248.92"/> +</segment> +<segment> +<pinref part="U$8" gate="G$1" pin="VCC"/> +<pinref part="+3V4" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="198.12" x2="327.66" y2="198.12" width="0.1524" layer="91"/> +<pinref part="U$8" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="198.12" x2="340.36" y2="198.12" width="0.1524" layer="91"/> +<wire x1="340.36" y1="198.12" x2="345.44" y2="198.12" width="0.1524" layer="91"/> +<wire x1="345.44" y1="198.12" x2="347.98" y2="198.12" width="0.1524" layer="91"/> +<wire x1="347.98" y1="182.88" x2="345.44" y2="182.88" width="0.1524" layer="91"/> +<wire x1="345.44" y1="182.88" x2="345.44" y2="198.12" width="0.1524" layer="91"/> +<junction x="345.44" y="198.12"/> +<pinref part="U$8" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="165.1" x2="340.36" y2="165.1" width="0.1524" layer="91"/> +<wire x1="340.36" y1="165.1" x2="340.36" y2="198.12" width="0.1524" layer="91"/> +<junction x="340.36" y="198.12"/> +<pinref part="C19" gate="G$1" pin="1"/> +<junction x="327.66" y="198.12"/> +</segment> +<segment> +<pinref part="U$10" gate="G$1" pin="VCC"/> +<pinref part="+3V8" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="147.32" x2="327.66" y2="147.32" width="0.1524" layer="91"/> +<pinref part="U$10" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="147.32" x2="340.36" y2="147.32" width="0.1524" layer="91"/> +<wire x1="340.36" y1="147.32" x2="345.44" y2="147.32" width="0.1524" layer="91"/> +<wire x1="345.44" y1="147.32" x2="347.98" y2="147.32" width="0.1524" layer="91"/> +<wire x1="347.98" y1="132.08" x2="345.44" y2="132.08" width="0.1524" layer="91"/> +<wire x1="345.44" y1="132.08" x2="345.44" y2="147.32" width="0.1524" layer="91"/> +<junction x="345.44" y="147.32"/> +<pinref part="U$10" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="114.3" x2="340.36" y2="114.3" width="0.1524" layer="91"/> +<wire x1="340.36" y1="114.3" x2="340.36" y2="147.32" width="0.1524" layer="91"/> +<junction x="340.36" y="147.32"/> +<pinref part="C20" gate="G$1" pin="1"/> +<junction x="327.66" y="147.32"/> +</segment> +<segment> +<pinref part="U$12" gate="G$1" pin="VCC"/> +<pinref part="+3V9" gate="G$1" pin="+3V3"/> +<wire x1="322.58" y1="45.72" x2="327.66" y2="45.72" width="0.1524" layer="91"/> +<pinref part="U$12" gate="G$1" pin="TE"/> +<wire x1="327.66" y1="45.72" x2="340.36" y2="45.72" width="0.1524" layer="91"/> +<wire x1="340.36" y1="45.72" x2="345.44" y2="45.72" width="0.1524" layer="91"/> +<wire x1="345.44" y1="45.72" x2="347.98" y2="45.72" width="0.1524" layer="91"/> +<wire x1="347.98" y1="30.48" x2="345.44" y2="30.48" width="0.1524" layer="91"/> +<wire x1="345.44" y1="30.48" x2="345.44" y2="45.72" width="0.1524" layer="91"/> +<junction x="345.44" y="45.72"/> +<pinref part="U$12" gate="G$1" pin="DE"/> +<wire x1="347.98" y1="12.7" x2="340.36" y2="12.7" width="0.1524" layer="91"/> +<wire x1="340.36" y1="12.7" x2="340.36" y2="45.72" width="0.1524" layer="91"/> +<junction x="340.36" y="45.72"/> +<pinref part="C21" gate="G$1" pin="1"/> +<junction x="327.66" y="45.72"/> +</segment> +<segment> +<pinref part="D16" gate="G$1" pin="A"/> +<wire x1="322.58" y1="20.32" x2="317.5" y2="20.32" width="0.1524" layer="91"/> +<pinref part="+3V10" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D15" gate="G$1" pin="A"/> +<wire x1="322.58" y1="7.62" x2="317.5" y2="7.62" width="0.1524" layer="91"/> +<pinref part="+3V11" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D7" gate="G$1" pin="A"/> +<wire x1="322.58" y1="58.42" x2="317.5" y2="58.42" width="0.1524" layer="91"/> +<pinref part="+3V12" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D8" gate="G$1" pin="A"/> +<wire x1="322.58" y1="71.12" x2="317.5" y2="71.12" width="0.1524" layer="91"/> +<pinref part="+3V13" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D13" gate="G$1" pin="A"/> +<wire x1="322.58" y1="109.22" x2="317.5" y2="109.22" width="0.1524" layer="91"/> +<pinref part="+3V14" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D14" gate="G$1" pin="A"/> +<wire x1="322.58" y1="121.92" x2="317.5" y2="121.92" width="0.1524" layer="91"/> +<pinref part="+3V15" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D11" gate="G$1" pin="A"/> +<wire x1="322.58" y1="160.02" x2="317.5" y2="160.02" width="0.1524" layer="91"/> +<pinref part="+3V16" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D12" gate="G$1" pin="A"/> +<wire x1="322.58" y1="172.72" x2="317.5" y2="172.72" width="0.1524" layer="91"/> +<pinref part="+3V17" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D9" gate="G$1" pin="A"/> +<wire x1="322.58" y1="210.82" x2="317.5" y2="210.82" width="0.1524" layer="91"/> +<pinref part="+3V18" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D10" gate="G$1" pin="A"/> +<wire x1="322.58" y1="223.52" x2="317.5" y2="223.52" width="0.1524" layer="91"/> +<pinref part="+3V19" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D5" gate="G$1" pin="A"/> +<wire x1="322.58" y1="261.62" x2="317.5" y2="261.62" width="0.1524" layer="91"/> +<pinref part="+3V20" gate="G$1" pin="+3V3"/> +</segment> +<segment> +<pinref part="D6" gate="G$1" pin="A"/> +<wire x1="322.58" y1="274.32" x2="317.5" y2="274.32" width="0.1524" layer="91"/> +<pinref part="+3V21" gate="G$1" pin="+3V3"/> +</segment> +</net> +<net name="N$9" class="0"> +<segment> +<pinref part="R1" gate="G$1" pin="2"/> +<pinref part="D1" gate="G$1" pin="C"/> +<wire x1="182.88" y1="396.24" x2="187.96" y2="396.24" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$10" class="0"> +<segment> +<pinref part="R2" gate="G$1" pin="2"/> +<pinref part="D2" gate="G$1" pin="C"/> +<wire x1="182.88" y1="386.08" x2="187.96" y2="386.08" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$11" class="0"> +<segment> +<pinref part="R3" gate="G$1" pin="2"/> +<pinref part="D3" gate="G$1" pin="C"/> +<wire x1="182.88" y1="375.92" x2="187.96" y2="375.92" width="0.1524" layer="91"/> +</segment> +</net> +<net name="STLCLK" class="0"> +<segment> +<pinref part="R2" gate="G$1" pin="1"/> +<wire x1="172.72" y1="386.08" x2="162.56" y2="386.08" width="0.1524" layer="91"/> +<label x="162.56" y="386.08" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA21/SER5-3/SER3-3/TC7-1"/> +<wire x1="182.88" y1="243.84" x2="208.28" y2="243.84" width="0.1524" layer="91"/> +<label x="185.42" y="243.84" size="1.778" layer="95"/> +</segment> +</net> +<net name="STLERR" class="0"> +<segment> +<pinref part="R3" gate="G$1" pin="1"/> +<wire x1="172.72" y1="375.92" x2="162.56" y2="375.92" width="0.1524" layer="91"/> +<label x="162.56" y="375.92" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB23/XOUT1/SER1-3/SER5-3/TC7-1"/> +<wire x1="182.88" y1="170.18" x2="208.28" y2="170.18" width="0.1524" layer="91"/> +<label x="185.42" y="170.18" size="1.778" layer="95"/> +</segment> +</net> +<net name="+5V" class="0"> +<segment> +<pinref part="P+5" gate="1" pin="+5V"/> +<pinref part="J1" gate="G$1" pin="1"/> +<wire x1="200.66" y1="355.6" x2="187.96" y2="355.6" width="0.1524" layer="91"/> +<wire x1="187.96" y1="355.6" x2="187.96" y2="360.68" width="0.1524" layer="91"/> +<junction x="187.96" y="355.6"/> +<wire x1="187.96" y1="360.68" x2="177.8" y2="360.68" width="0.1524" layer="91"/> +<pinref part="J1" gate="G$1" pin="2"/> +<pinref part="X1" gate="G$1" pin="VBUS"/> +<wire x1="177.8" y1="355.6" x2="149.86" y2="355.6" width="0.1524" layer="91"/> +<wire x1="177.8" y1="360.68" x2="177.8" y2="355.6" width="0.1524" layer="91"/> +<junction x="177.8" y="355.6"/> +</segment> +<segment> +<pinref part="P+2" gate="1" pin="+5V"/> +<pinref part="U3" gate="G$1" pin="VIN"/> +<pinref part="U3" gate="G$1" pin="EN"/> +<wire x1="162.56" y1="337.82" x2="165.1" y2="337.82" width="0.1524" layer="91"/> +<wire x1="165.1" y1="332.74" x2="162.56" y2="332.74" width="0.1524" layer="91"/> +<wire x1="162.56" y1="332.74" x2="162.56" y2="337.82" width="0.1524" layer="91"/> +<junction x="162.56" y="337.82"/> +<wire x1="104.14" y1="337.82" x2="132.08" y2="337.82" width="0.1524" layer="91"/> +<wire x1="132.08" y1="337.82" x2="162.56" y2="337.82" width="0.1524" layer="91"/> +<wire x1="132.08" y1="340.36" x2="132.08" y2="337.82" width="0.1524" layer="91"/> +<junction x="132.08" y="337.82"/> +<pinref part="U$14" gate="G$1" pin="2"/> +</segment> +</net> +<net name="USBDM" class="0"> +<segment> +<pinref part="X1" gate="G$1" pin="D-"/> +<wire x1="149.86" y1="353.06" x2="165.1" y2="353.06" width="0.1524" layer="91"/> +<label x="165.1" y="353.06" size="1.778" layer="95" rot="R180"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA24/SER3-2/SER5-2/TC5-0/PDEC0-0/USBDM"/> +<wire x1="182.88" y1="236.22" x2="208.28" y2="236.22" width="0.1524" layer="91"/> +<label x="185.42" y="236.22" size="1.778" layer="95"/> +</segment> +</net> +<net name="USBDP" class="0"> +<segment> +<pinref part="X1" gate="G$1" pin="D+"/> +<wire x1="149.86" y1="350.52" x2="165.1" y2="350.52" width="0.1524" layer="91"/> +<label x="165.1" y="350.52" size="1.778" layer="95" rot="R180"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA25/SER3-3/SER5-3/TC5-1/PDEC0-1/USBDP"/> +<wire x1="182.88" y1="233.68" x2="208.28" y2="233.68" width="0.1524" layer="91"/> +<label x="185.42" y="233.68" size="1.778" layer="95"/> +</segment> +</net> +<net name="SWDIO" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA31/SER7-3/SER1-3/TC6-1/SWDIO"/> +<wire x1="182.88" y1="226.06" x2="208.28" y2="226.06" width="0.1524" layer="91"/> +<label x="185.42" y="226.06" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="J6" gate="G$1" pin="SWDIO"/> +<wire x1="25.4" y1="185.42" x2="12.7" y2="185.42" width="0.1524" layer="91"/> +<label x="12.7" y="185.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="SWDCLK" class="0"> +<segment> +<pinref part="R7" gate="G$1" pin="1"/> +<wire x1="71.12" y1="190.5" x2="71.12" y2="195.58" width="0.1524" layer="91"/> +<wire x1="71.12" y1="190.5" x2="55.88" y2="190.5" width="0.1524" layer="91"/> +<label x="55.88" y="190.5" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA30/SER7-2/SER1-2/TC6-0/SWCLK"/> +<wire x1="182.88" y1="228.6" x2="208.28" y2="228.6" width="0.1524" layer="91"/> +<label x="185.42" y="228.6" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="J6" gate="G$1" pin="SWCLK"/> +<wire x1="25.4" y1="187.96" x2="12.7" y2="187.96" width="0.1524" layer="91"/> +<label x="12.7" y="187.96" size="1.778" layer="95"/> +</segment> +</net> +<net name="RESET" class="0"> +<segment> +<wire x1="55.88" y1="182.88" x2="60.96" y2="182.88" width="0.1524" layer="91"/> +<pinref part="R6" gate="G$1" pin="1"/> +<wire x1="60.96" y1="182.88" x2="78.74" y2="182.88" width="0.1524" layer="91"/> +<wire x1="78.74" y1="182.88" x2="78.74" y2="185.42" width="0.1524" layer="91"/> +<junction x="78.74" y="182.88"/> +<pinref part="C4" gate="G$1" pin="1"/> +<wire x1="78.74" y1="175.26" x2="78.74" y2="177.8" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="RESETN"/> +<wire x1="78.74" y1="177.8" x2="78.74" y2="182.88" width="0.1524" layer="91"/> +<wire x1="78.74" y1="177.8" x2="104.14" y2="177.8" width="0.1524" layer="91"/> +<junction x="78.74" y="177.8"/> +<label x="86.36" y="177.8" size="1.778" layer="95"/> +<pinref part="S1" gate="G$1" pin="S1"/> +<wire x1="60.96" y1="165.1" x2="60.96" y2="182.88" width="0.1524" layer="91"/> +<junction x="60.96" y="182.88"/> +</segment> +<segment> +<pinref part="J6" gate="G$1" pin="RESET"/> +<wire x1="25.4" y1="195.58" x2="12.7" y2="195.58" width="0.1524" layer="91"/> +<label x="12.7" y="195.58" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTA-TX" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA22/SER3-0/SER5-1/TC4-0"/> +<wire x1="182.88" y1="241.3" x2="208.28" y2="241.3" width="0.1524" layer="91"/> +<label x="185.42" y="241.3" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$2" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="261.62" x2="335.28" y2="261.62" width="0.1524" layer="91"/> +<label x="335.28" y="261.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTA-RX" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA20/SER5-2/SER3-2/TC7-0"/> +<wire x1="182.88" y1="246.38" x2="208.28" y2="246.38" width="0.1524" layer="91"/> +<label x="185.42" y="246.38" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U$2" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="274.32" x2="335.28" y2="274.32" width="0.1524" layer="91"/> +<label x="335.28" y="274.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="RTCXOUT" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA01/XOUT32/SER1-1/TC2-1"/> +<wire x1="182.88" y1="294.64" x2="220.98" y2="294.64" width="0.1524" layer="91"/> +<label x="185.42" y="294.64" size="1.778" layer="95"/> +<pinref part="Y2" gate="G$1" pin="1"/> +<pinref part="C11" gate="G$1" pin="2"/> +<wire x1="220.98" y1="294.64" x2="228.6" y2="294.64" width="0.1524" layer="91"/> +<junction x="220.98" y="294.64"/> +</segment> +</net> +<net name="RCTXIN" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA00/XIN32/SER1-0/TC2-0"/> +<wire x1="182.88" y1="297.18" x2="213.36" y2="297.18" width="0.1524" layer="91"/> +<label x="185.42" y="297.18" size="1.778" layer="95"/> +<pinref part="Y2" gate="G$1" pin="2"/> +<pinref part="C10" gate="G$1" pin="1"/> +<wire x1="220.98" y1="299.72" x2="228.6" y2="299.72" width="0.1524" layer="91"/> +<wire x1="213.36" y1="297.18" x2="213.36" y2="299.72" width="0.1524" layer="91"/> +<wire x1="213.36" y1="299.72" x2="220.98" y2="299.72" width="0.1524" layer="91"/> +<junction x="220.98" y="299.72"/> +</segment> +</net> +<net name="VDDCORE" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="VDDCORE"/> +<pinref part="C1" gate="G$1" pin="1"/> +<wire x1="104.14" y1="251.46" x2="91.44" y2="251.46" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="1"/> +<wire x1="91.44" y1="251.46" x2="78.74" y2="251.46" width="0.1524" layer="91"/> +<junction x="91.44" y="251.46"/> +<pinref part="L1" gate="G$1" pin="2"/> +<wire x1="81.28" y1="266.7" x2="78.74" y2="266.7" width="0.1524" layer="91"/> +<wire x1="78.74" y1="266.7" x2="78.74" y2="251.46" width="0.1524" layer="91"/> +<junction x="78.74" y="251.46"/> +<label x="81.28" y="251.46" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$16" class="0"> +<segment> +<pinref part="L1" gate="G$1" pin="1"/> +<pinref part="U5" gate="G$1" pin="VSW"/> +<wire x1="96.52" y1="266.7" x2="104.14" y2="266.7" width="0.1524" layer="91"/> +</segment> +</net> +<net name="NEOPIXEL" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PB03/ADC0/SER5-1/TC6"/> +<wire x1="182.88" y1="210.82" x2="208.28" y2="210.82" width="0.1524" layer="91"/> +<label x="185.42" y="210.82" size="1.778" layer="95"/> +</segment> +</net> +<net name="ARDUINO13" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PA23/SER3-1/SER5-0/TC4-1"/> +<wire x1="182.88" y1="238.76" x2="215.9" y2="238.76" width="0.1524" layer="91"/> +<label x="185.42" y="238.76" size="1.778" layer="95"/> +<pinref part="D4" gate="G$1" pin="A"/> +</segment> +</net> +<net name="N$1" class="0"> +<segment> +<pinref part="D4" gate="G$1" pin="C"/> +<pinref part="R8" gate="G$1" pin="1"/> +<wire x1="223.52" y1="238.76" x2="231.14" y2="238.76" width="0.1524" layer="91"/> +</segment> +</net> +<net name="PORTE-TX" class="0"> +<segment> +<pinref part="U$1" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="58.42" x2="335.28" y2="58.42" width="0.1524" layer="91"/> +<label x="335.28" y="58.42" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB02/ADC0-14/SER5-0/TC6-0"/> +<wire x1="182.88" y1="213.36" x2="208.28" y2="213.36" width="0.1524" layer="91"/> +<label x="185.42" y="213.36" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTE-RX" class="0"> +<segment> +<pinref part="U$1" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="71.12" x2="335.28" y2="71.12" width="0.1524" layer="91"/> +<label x="335.28" y="71.12" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB00/ADC0-12/SER5-2/TC7-0"/> +<wire x1="182.88" y1="218.44" x2="208.28" y2="218.44" width="0.1524" layer="91"/> +<label x="185.42" y="218.44" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTA-GREEN" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PB07/ADC1-9"/> +<wire x1="182.88" y1="200.66" x2="208.28" y2="200.66" width="0.1524" layer="91"/> +<label x="185.42" y="200.66" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R4" gate="G$1" pin="1"/> +<wire x1="297.18" y1="261.62" x2="274.32" y2="261.62" width="0.1524" layer="91"/> +<label x="274.32" y="261.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="XOUT0" class="0"> +<segment> +<pinref part="C14" gate="G$1" pin="2"/> +<pinref part="U5" gate="G$1" pin="PA15/XOUT0/SER2-3/SER4-3/TC3-1"/> +<wire x1="182.88" y1="259.08" x2="220.98" y2="259.08" width="0.1524" layer="91"/> +<label x="185.42" y="259.08" size="1.778" layer="95"/> +<pinref part="Y1" gate="G$1" pin="1"/> +<wire x1="220.98" y1="259.08" x2="228.6" y2="259.08" width="0.1524" layer="91"/> +<junction x="220.98" y="259.08"/> +</segment> +</net> +<net name="XIN0" class="0"> +<segment> +<pinref part="C12" gate="G$1" pin="1"/> +<wire x1="215.9" y1="264.16" x2="220.98" y2="264.16" width="0.1524" layer="91"/> +<pinref part="U5" gate="G$1" pin="PA14/XIN0/SER2-2/SER4-2/TC3-0"/> +<wire x1="220.98" y1="264.16" x2="228.6" y2="264.16" width="0.1524" layer="91"/> +<wire x1="182.88" y1="261.62" x2="215.9" y2="261.62" width="0.1524" layer="91"/> +<wire x1="215.9" y1="261.62" x2="215.9" y2="264.16" width="0.1524" layer="91"/> +<label x="185.42" y="261.62" size="1.778" layer="95"/> +<pinref part="Y1" gate="G$1" pin="2"/> +<junction x="220.98" y="264.16"/> +</segment> +</net> +<net name="N$2" class="0"> +<segment> +<pinref part="D5" gate="G$1" pin="C"/> +<pinref part="R4" gate="G$1" pin="2"/> +<wire x1="309.88" y1="261.62" x2="307.34" y2="261.62" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$3" class="0"> +<segment> +<pinref part="D6" gate="G$1" pin="C"/> +<pinref part="R5" gate="G$1" pin="2"/> +<wire x1="309.88" y1="274.32" x2="307.34" y2="274.32" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$7" class="0"> +<segment> +<pinref part="D7" gate="G$1" pin="C"/> +<pinref part="R9" gate="G$1" pin="2"/> +<wire x1="309.88" y1="58.42" x2="307.34" y2="58.42" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$12" class="0"> +<segment> +<pinref part="D8" gate="G$1" pin="C"/> +<pinref part="R10" gate="G$1" pin="2"/> +<wire x1="309.88" y1="71.12" x2="307.34" y2="71.12" width="0.1524" layer="91"/> +</segment> +</net> +<net name="PORTE-GREEN" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PB05/ADC1-7"/> +<wire x1="182.88" y1="205.74" x2="208.28" y2="205.74" width="0.1524" layer="91"/> +<label x="185.42" y="205.74" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R9" gate="G$1" pin="1"/> +<wire x1="297.18" y1="58.42" x2="274.32" y2="58.42" width="0.1524" layer="91"/> +<label x="274.32" y="58.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTE-YELLOW" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PB08/ADC0-2/ADC1-9/SER4-0/TC4-0"/> +<wire x1="182.88" y1="198.12" x2="208.28" y2="198.12" width="0.1524" layer="91"/> +<label x="185.42" y="198.12" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R10" gate="G$1" pin="1"/> +<wire x1="297.18" y1="71.12" x2="274.32" y2="71.12" width="0.1524" layer="91"/> +<label x="274.32" y="71.12" size="1.778" layer="95"/> +</segment> +</net> +<net name="CRX-A" class="0"> +<segment> +<pinref part="U$5" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="81.28" x2="403.86" y2="81.28" width="0.1524" layer="91"/> +<wire x1="403.86" y1="81.28" x2="403.86" y2="73.66" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="A"/> +<wire x1="403.86" y1="73.66" x2="383.54" y2="73.66" width="0.1524" layer="91"/> +<label x="386.08" y="73.66" size="1.778" layer="95"/> +</segment> +</net> +<net name="CRX-B" class="0"> +<segment> +<pinref part="U$1" gate="G$1" pin="B"/> +<wire x1="383.54" y1="68.58" x2="408.94" y2="68.58" width="0.1524" layer="91"/> +<wire x1="408.94" y1="68.58" x2="408.94" y2="86.36" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="TX-Z"/> +<wire x1="408.94" y1="86.36" x2="398.78" y2="86.36" width="0.1524" layer="91"/> +<label x="386.08" y="68.58" size="1.778" layer="95"/> +</segment> +</net> +<net name="CTX-Z" class="0"> +<segment> +<pinref part="U$5" gate="G$1" pin="RX-B"/> +<wire x1="398.78" y1="91.44" x2="414.02" y2="91.44" width="0.1524" layer="91"/> +<wire x1="414.02" y1="91.44" x2="414.02" y2="63.5" width="0.1524" layer="91"/> +<pinref part="U$1" gate="G$1" pin="Z"/> +<wire x1="414.02" y1="63.5" x2="383.54" y2="63.5" width="0.1524" layer="91"/> +<label x="386.08" y="63.5" size="1.778" layer="95"/> +</segment> +</net> +<net name="CTZ-Y" class="0"> +<segment> +<pinref part="U$1" gate="G$1" pin="Y"/> +<wire x1="383.54" y1="58.42" x2="419.1" y2="58.42" width="0.1524" layer="91"/> +<wire x1="419.1" y1="58.42" x2="419.1" y2="96.52" width="0.1524" layer="91"/> +<pinref part="U$5" gate="G$1" pin="RX-A"/> +<wire x1="419.1" y1="96.52" x2="398.78" y2="96.52" width="0.1524" layer="91"/> +<label x="386.08" y="58.42" size="1.778" layer="95"/> +</segment> +</net> +<net name="PDRX-A" class="0"> +<segment> +<pinref part="U$11" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="132.08" x2="403.86" y2="132.08" width="0.1524" layer="91"/> +<wire x1="403.86" y1="132.08" x2="403.86" y2="124.46" width="0.1524" layer="91"/> +<pinref part="U$10" gate="G$1" pin="A"/> +<wire x1="403.86" y1="124.46" x2="383.54" y2="124.46" width="0.1524" layer="91"/> +<label x="386.08" y="124.46" size="1.778" layer="95"/> +</segment> +</net> +<net name="PDRX-B" class="0"> +<segment> +<pinref part="U$11" gate="G$1" pin="TX-Z"/> +<wire x1="398.78" y1="137.16" x2="408.94" y2="137.16" width="0.1524" layer="91"/> +<wire x1="408.94" y1="137.16" x2="408.94" y2="119.38" width="0.1524" layer="91"/> +<pinref part="U$10" gate="G$1" pin="B"/> +<wire x1="408.94" y1="119.38" x2="383.54" y2="119.38" width="0.1524" layer="91"/> +<label x="386.08" y="119.38" size="1.778" layer="95"/> +</segment> +</net> +<net name="PDTX-Z" class="0"> +<segment> +<pinref part="U$10" gate="G$1" pin="Z"/> +<wire x1="383.54" y1="114.3" x2="414.02" y2="114.3" width="0.1524" layer="91"/> +<pinref part="U$11" gate="G$1" pin="RX-B"/> +<wire x1="414.02" y1="114.3" x2="414.02" y2="142.24" width="0.1524" layer="91"/> +<wire x1="414.02" y1="142.24" x2="398.78" y2="142.24" width="0.1524" layer="91"/> +<label x="386.08" y="114.3" size="1.778" layer="95"/> +</segment> +</net> +<net name="PDTX-Y" class="0"> +<segment> +<pinref part="U$11" gate="G$1" pin="RX-A"/> +<wire x1="398.78" y1="147.32" x2="419.1" y2="147.32" width="0.1524" layer="91"/> +<pinref part="U$10" gate="G$1" pin="Y"/> +<wire x1="419.1" y1="147.32" x2="419.1" y2="109.22" width="0.1524" layer="91"/> +<wire x1="419.1" y1="109.22" x2="383.54" y2="109.22" width="0.1524" layer="91"/> +<label x="386.08" y="109.22" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTA-YELLOW" class="0"> +<segment> +<pinref part="U5" gate="G$1" pin="PB06/ADC1-8"/> +<wire x1="182.88" y1="203.2" x2="208.28" y2="203.2" width="0.1524" layer="91"/> +<label x="185.42" y="203.2" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="R5" gate="G$1" pin="1"/> +<wire x1="297.18" y1="274.32" x2="274.32" y2="274.32" width="0.1524" layer="91"/> +<label x="274.32" y="274.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$4" class="0"> +<segment> +<pinref part="D9" gate="G$1" pin="C"/> +<pinref part="R11" gate="G$1" pin="2"/> +<wire x1="309.88" y1="210.82" x2="307.34" y2="210.82" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$5" class="0"> +<segment> +<pinref part="D10" gate="G$1" pin="C"/> +<pinref part="R12" gate="G$1" pin="2"/> +<wire x1="309.88" y1="223.52" x2="307.34" y2="223.52" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$6" class="0"> +<segment> +<pinref part="D11" gate="G$1" pin="C"/> +<pinref part="R13" gate="G$1" pin="2"/> +<wire x1="309.88" y1="160.02" x2="307.34" y2="160.02" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$8" class="0"> +<segment> +<pinref part="D12" gate="G$1" pin="C"/> +<pinref part="R14" gate="G$1" pin="2"/> +<wire x1="309.88" y1="172.72" x2="307.34" y2="172.72" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$13" class="0"> +<segment> +<pinref part="D13" gate="G$1" pin="C"/> +<pinref part="R15" gate="G$1" pin="2"/> +<wire x1="309.88" y1="109.22" x2="307.34" y2="109.22" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$14" class="0"> +<segment> +<pinref part="D14" gate="G$1" pin="C"/> +<pinref part="R16" gate="G$1" pin="2"/> +<wire x1="309.88" y1="121.92" x2="307.34" y2="121.92" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$15" class="0"> +<segment> +<pinref part="D15" gate="G$1" pin="C"/> +<pinref part="R17" gate="G$1" pin="2"/> +<wire x1="309.88" y1="7.62" x2="307.34" y2="7.62" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$17" class="0"> +<segment> +<pinref part="D16" gate="G$1" pin="C"/> +<pinref part="R18" gate="G$1" pin="2"/> +<wire x1="309.88" y1="20.32" x2="307.34" y2="20.32" width="0.1524" layer="91"/> +</segment> +</net> +<net name="PORTB-YELLOW" class="0"> +<segment> +<pinref part="R12" gate="G$1" pin="1"/> +<wire x1="297.18" y1="223.52" x2="274.32" y2="223.52" width="0.1524" layer="91"/> +<label x="274.32" y="223.52" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB09/ADC0-3/ADC1-1/SER4-1/TC4-1"/> +<wire x1="182.88" y1="195.58" x2="208.28" y2="195.58" width="0.1524" layer="91"/> +<label x="185.42" y="195.58" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTB-GREEN" class="0"> +<segment> +<pinref part="R11" gate="G$1" pin="1"/> +<wire x1="297.18" y1="210.82" x2="274.32" y2="210.82" width="0.1524" layer="91"/> +<label x="274.32" y="210.82" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA04/ANAREF-VREFB/ADC0-4/SER0-0/TC0-0"/> +<wire x1="182.88" y1="287.02" x2="208.28" y2="287.02" width="0.1524" layer="91"/> +<label x="185.42" y="287.02" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTB-RX" class="0"> +<segment> +<pinref part="U$6" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="223.52" x2="335.28" y2="223.52" width="0.1524" layer="91"/> +<label x="335.28" y="223.52" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB14/SER4-2/TC5-0"/> +<wire x1="182.88" y1="182.88" x2="208.28" y2="182.88" width="0.1524" layer="91"/> +<label x="185.42" y="182.88" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTB-TX" class="0"> +<segment> +<pinref part="U$6" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="210.82" x2="335.28" y2="210.82" width="0.1524" layer="91"/> +<label x="335.28" y="210.82" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PB12/SER4-0/TC4-0"/> +<wire x1="182.88" y1="187.96" x2="208.28" y2="187.96" width="0.1524" layer="91"/> +<label x="185.42" y="187.96" size="1.778" layer="95"/> +</segment> +</net> +<net name="PBRX-A" class="0"> +<segment> +<pinref part="U$7" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="233.68" x2="403.86" y2="233.68" width="0.1524" layer="91"/> +<wire x1="403.86" y1="233.68" x2="403.86" y2="226.06" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="A"/> +<wire x1="403.86" y1="226.06" x2="383.54" y2="226.06" width="0.1524" layer="91"/> +<label x="386.08" y="226.06" size="1.778" layer="95"/> +</segment> +</net> +<net name="PBRX-B" class="0"> +<segment> +<pinref part="U$7" gate="G$1" pin="TX-Z"/> +<wire x1="398.78" y1="238.76" x2="408.94" y2="238.76" width="0.1524" layer="91"/> +<wire x1="408.94" y1="238.76" x2="408.94" y2="220.98" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="B"/> +<wire x1="408.94" y1="220.98" x2="383.54" y2="220.98" width="0.1524" layer="91"/> +<label x="386.08" y="220.98" size="1.778" layer="95"/> +</segment> +</net> +<net name="PBTX-Z" class="0"> +<segment> +<pinref part="U$6" gate="G$1" pin="Z"/> +<wire x1="383.54" y1="215.9" x2="414.02" y2="215.9" width="0.1524" layer="91"/> +<pinref part="U$7" gate="G$1" pin="RX-B"/> +<wire x1="414.02" y1="215.9" x2="414.02" y2="243.84" width="0.1524" layer="91"/> +<wire x1="414.02" y1="243.84" x2="398.78" y2="243.84" width="0.1524" layer="91"/> +<label x="386.08" y="215.9" size="1.778" layer="95"/> +</segment> +</net> +<net name="PBTX-Y" class="0"> +<segment> +<pinref part="U$7" gate="G$1" pin="RX-A"/> +<wire x1="398.78" y1="248.92" x2="419.1" y2="248.92" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="Y"/> +<wire x1="419.1" y1="248.92" x2="419.1" y2="210.82" width="0.1524" layer="91"/> +<wire x1="419.1" y1="210.82" x2="383.54" y2="210.82" width="0.1524" layer="91"/> +<label x="386.08" y="210.82" size="1.778" layer="95"/> +</segment> +</net> +<net name="PARX-A" class="0"> +<segment> +<pinref part="U$4" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="284.48" x2="403.86" y2="284.48" width="0.1524" layer="91"/> +<wire x1="403.86" y1="284.48" x2="403.86" y2="276.86" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="A"/> +<wire x1="403.86" y1="276.86" x2="383.54" y2="276.86" width="0.1524" layer="91"/> +<label x="386.08" y="276.86" size="1.778" layer="95"/> +</segment> +</net> +<net name="PARX-B" class="0"> +<segment> +<pinref part="U$4" gate="G$1" pin="TX-Z"/> +<wire x1="398.78" y1="289.56" x2="408.94" y2="289.56" width="0.1524" layer="91"/> +<wire x1="408.94" y1="289.56" x2="408.94" y2="271.78" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="B"/> +<wire x1="408.94" y1="271.78" x2="383.54" y2="271.78" width="0.1524" layer="91"/> +<label x="386.08" y="271.78" size="1.778" layer="95"/> +</segment> +</net> +<net name="PATX-Z" class="0"> +<segment> +<pinref part="U$2" gate="G$1" pin="Z"/> +<wire x1="383.54" y1="266.7" x2="414.02" y2="266.7" width="0.1524" layer="91"/> +<pinref part="U$4" gate="G$1" pin="RX-B"/> +<wire x1="414.02" y1="266.7" x2="414.02" y2="294.64" width="0.1524" layer="91"/> +<wire x1="414.02" y1="294.64" x2="398.78" y2="294.64" width="0.1524" layer="91"/> +<label x="386.08" y="266.7" size="1.778" layer="95"/> +</segment> +</net> +<net name="PATX-Y" class="0"> +<segment> +<pinref part="U$4" gate="G$1" pin="RX-A"/> +<wire x1="398.78" y1="299.72" x2="419.1" y2="299.72" width="0.1524" layer="91"/> +<pinref part="U$2" gate="G$1" pin="Y"/> +<wire x1="419.1" y1="299.72" x2="419.1" y2="261.62" width="0.1524" layer="91"/> +<wire x1="419.1" y1="261.62" x2="383.54" y2="261.62" width="0.1524" layer="91"/> +<label x="386.08" y="261.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTC-YELLOW" class="0"> +<segment> +<pinref part="R14" gate="G$1" pin="1"/> +<wire x1="297.18" y1="172.72" x2="274.32" y2="172.72" width="0.1524" layer="91"/> +<label x="274.32" y="172.72" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA05/ADC0-5/DAC-1/SER0-1/TC0-1"/> +<wire x1="182.88" y1="284.48" x2="208.28" y2="284.48" width="0.1524" layer="91"/> +<label x="185.42" y="284.48" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTC-GREEN" class="0"> +<segment> +<pinref part="R13" gate="G$1" pin="1"/> +<wire x1="297.18" y1="160.02" x2="274.32" y2="160.02" width="0.1524" layer="91"/> +<label x="274.32" y="160.02" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA06/ANAREF-VREFC/ADC0-6/SER0-2/TC1-0"/> +<wire x1="182.88" y1="281.94" x2="208.28" y2="281.94" width="0.1524" layer="91"/> +<label x="185.42" y="281.94" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTC-RX" class="0"> +<segment> +<pinref part="U$8" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="172.72" x2="335.28" y2="172.72" width="0.1524" layer="91"/> +<label x="335.28" y="172.72" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA10/ADC0-10/SER0-2/SER2-2/TC1-0/TCC0-2"/> +<wire x1="182.88" y1="271.78" x2="208.28" y2="271.78" width="0.1524" layer="91"/> +<label x="185.42" y="271.78" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTC-TX" class="0"> +<segment> +<pinref part="U$8" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="160.02" x2="335.28" y2="160.02" width="0.1524" layer="91"/> +<label x="335.28" y="160.02" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA08/ADC0-8/ADC1-2/SER0-0/SER2-1/TC0-0/TCC0-0"/> +<wire x1="182.88" y1="276.86" x2="208.28" y2="276.86" width="0.1524" layer="91"/> +<label x="185.42" y="276.86" size="1.778" layer="95"/> +</segment> +</net> +<net name="PCRX-A" class="0"> +<segment> +<pinref part="U$9" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="182.88" x2="403.86" y2="182.88" width="0.1524" layer="91"/> +<wire x1="403.86" y1="182.88" x2="403.86" y2="175.26" width="0.1524" layer="91"/> +<pinref part="U$8" gate="G$1" pin="A"/> +<wire x1="403.86" y1="175.26" x2="383.54" y2="175.26" width="0.1524" layer="91"/> +<label x="386.08" y="175.26" size="1.778" layer="95"/> +</segment> +</net> +<net name="PCRX-B" class="0"> +<segment> +<pinref part="U$9" gate="G$1" pin="TX-Z"/> +<wire x1="398.78" y1="187.96" x2="408.94" y2="187.96" width="0.1524" layer="91"/> +<wire x1="408.94" y1="187.96" x2="408.94" y2="170.18" width="0.1524" layer="91"/> +<pinref part="U$8" gate="G$1" pin="B"/> +<wire x1="408.94" y1="170.18" x2="383.54" y2="170.18" width="0.1524" layer="91"/> +<label x="386.08" y="170.18" size="1.778" layer="95"/> +</segment> +</net> +<net name="PCTX-Z" class="0"> +<segment> +<pinref part="U$8" gate="G$1" pin="Z"/> +<wire x1="383.54" y1="165.1" x2="414.02" y2="165.1" width="0.1524" layer="91"/> +<pinref part="U$9" gate="G$1" pin="RX-B"/> +<wire x1="414.02" y1="165.1" x2="414.02" y2="193.04" width="0.1524" layer="91"/> +<wire x1="414.02" y1="193.04" x2="398.78" y2="193.04" width="0.1524" layer="91"/> +<label x="386.08" y="165.1" size="1.778" layer="95"/> +</segment> +</net> +<net name="PCTX-Y" class="0"> +<segment> +<pinref part="U$9" gate="G$1" pin="RX-A"/> +<wire x1="398.78" y1="198.12" x2="419.1" y2="198.12" width="0.1524" layer="91"/> +<pinref part="U$8" gate="G$1" pin="Y"/> +<wire x1="419.1" y1="198.12" x2="419.1" y2="160.02" width="0.1524" layer="91"/> +<wire x1="419.1" y1="160.02" x2="383.54" y2="160.02" width="0.1524" layer="91"/> +<label x="386.08" y="160.02" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTD-YELLOW" class="0"> +<segment> +<pinref part="R16" gate="G$1" pin="1"/> +<wire x1="297.18" y1="121.92" x2="274.32" y2="121.92" width="0.1524" layer="91"/> +<label x="274.32" y="121.92" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA03/ANAREF-VREFA/ADC0-1"/> +<wire x1="182.88" y1="289.56" x2="208.28" y2="289.56" width="0.1524" layer="91"/> +<label x="185.42" y="289.56" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTD-GREEN" class="0"> +<segment> +<pinref part="R15" gate="G$1" pin="1"/> +<wire x1="297.18" y1="109.22" x2="274.32" y2="109.22" width="0.1524" layer="91"/> +<label x="274.32" y="109.22" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA02/ADC0-1/DAC-0"/> +<wire x1="182.88" y1="292.1" x2="208.28" y2="292.1" width="0.1524" layer="91"/> +<label x="185.42" y="292.1" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTD-RX" class="0"> +<segment> +<pinref part="U$10" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="121.92" x2="335.28" y2="121.92" width="0.1524" layer="91"/> +<label x="335.28" y="121.92" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA18/SER1-2/SER3-2/TC3-0"/> +<wire x1="182.88" y1="251.46" x2="208.28" y2="251.46" width="0.1524" layer="91"/> +<label x="185.42" y="251.46" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTD-TX" class="0"> +<segment> +<pinref part="U$10" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="109.22" x2="335.28" y2="109.22" width="0.1524" layer="91"/> +<label x="335.28" y="109.22" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA16/SER1-0/SER3-1/TC2-0/TCC0-4"/> +<wire x1="182.88" y1="256.54" x2="208.28" y2="256.54" width="0.1524" layer="91"/> +<label x="185.42" y="256.54" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTF-YELLOW" class="0"> +<segment> +<pinref part="R18" gate="G$1" pin="1"/> +<wire x1="297.18" y1="20.32" x2="274.32" y2="20.32" width="0.1524" layer="91"/> +<label x="274.32" y="20.32" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA11/ADC0-11/SER0-3/SER2-3/TC1-1/TCC0-3"/> +<wire x1="182.88" y1="269.24" x2="208.28" y2="269.24" width="0.1524" layer="91"/> +<label x="185.42" y="269.24" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTF-GREEN" class="0"> +<segment> +<pinref part="R17" gate="G$1" pin="1"/> +<wire x1="297.18" y1="7.62" x2="274.32" y2="7.62" width="0.1524" layer="91"/> +<label x="274.32" y="7.62" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA09/ADC0-9/ADC1-3/SER0-1/SER2-0/TC0-1/TCC0-1"/> +<wire x1="182.88" y1="274.32" x2="208.28" y2="274.32" width="0.1524" layer="91"/> +<label x="185.42" y="274.32" size="1.778" layer="95"/> +</segment> +</net> +<net name="CFRX-A" class="0"> +<segment> +<pinref part="U$13" gate="G$1" pin="TX-Y"/> +<wire x1="398.78" y1="30.48" x2="403.86" y2="30.48" width="0.1524" layer="91"/> +<wire x1="403.86" y1="30.48" x2="403.86" y2="22.86" width="0.1524" layer="91"/> +<pinref part="U$12" gate="G$1" pin="A"/> +<wire x1="403.86" y1="22.86" x2="383.54" y2="22.86" width="0.1524" layer="91"/> +<label x="386.08" y="22.86" size="1.778" layer="95"/> +</segment> +</net> +<net name="CFRX-B" class="0"> +<segment> +<pinref part="U$12" gate="G$1" pin="B"/> +<wire x1="383.54" y1="17.78" x2="408.94" y2="17.78" width="0.1524" layer="91"/> +<wire x1="408.94" y1="17.78" x2="408.94" y2="35.56" width="0.1524" layer="91"/> +<pinref part="U$13" gate="G$1" pin="TX-Z"/> +<wire x1="408.94" y1="35.56" x2="398.78" y2="35.56" width="0.1524" layer="91"/> +<label x="386.08" y="17.78" size="1.778" layer="95"/> +</segment> +</net> +<net name="CFTX-Z" class="0"> +<segment> +<pinref part="U$13" gate="G$1" pin="RX-B"/> +<wire x1="398.78" y1="40.64" x2="414.02" y2="40.64" width="0.1524" layer="91"/> +<wire x1="414.02" y1="40.64" x2="414.02" y2="12.7" width="0.1524" layer="91"/> +<pinref part="U$12" gate="G$1" pin="Z"/> +<wire x1="414.02" y1="12.7" x2="383.54" y2="12.7" width="0.1524" layer="91"/> +<label x="386.08" y="12.7" size="1.778" layer="95"/> +</segment> +</net> +<net name="CFTZ-Y" class="0"> +<segment> +<pinref part="U$12" gate="G$1" pin="Y"/> +<wire x1="383.54" y1="7.62" x2="419.1" y2="7.62" width="0.1524" layer="91"/> +<wire x1="419.1" y1="7.62" x2="419.1" y2="45.72" width="0.1524" layer="91"/> +<pinref part="U$13" gate="G$1" pin="RX-A"/> +<wire x1="419.1" y1="45.72" x2="398.78" y2="45.72" width="0.1524" layer="91"/> +<label x="386.08" y="7.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTF-RX" class="0"> +<segment> +<pinref part="U$12" gate="G$1" pin="RO"/> +<wire x1="347.98" y1="20.32" x2="335.28" y2="20.32" width="0.1524" layer="91"/> +<label x="335.28" y="20.32" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA13/SER2-1/SER4-0/TC2-1/TCC0-7"/> +<wire x1="182.88" y1="264.16" x2="208.28" y2="264.16" width="0.1524" layer="91"/> +<label x="185.42" y="264.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="PORTF-TX" class="0"> +<segment> +<pinref part="U$12" gate="G$1" pin="DI"/> +<wire x1="347.98" y1="7.62" x2="335.28" y2="7.62" width="0.1524" layer="91"/> +<label x="335.28" y="7.62" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="U5" gate="G$1" pin="PA12/SER2-0/SER4-1/TC2-0/TCC0-6"/> +<wire x1="182.88" y1="266.7" x2="208.28" y2="266.7" width="0.1524" layer="91"/> +<label x="185.42" y="266.7" size="1.778" layer="95"/> +</segment> +</net> +</nets> +</sheet> +</sheets> +</schematic> +</drawing> +<compatibility> +<note version="6.3" minversion="6.2.2" severity="warning"> +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. +</note> +<note version="8.2" severity="warning"> +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. +</note> +<note version="8.3" severity="warning"> +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. +</note> +</compatibility> +</eagle> diff --git a/routerboard-atsamd51/schematic.png b/routerboard-atsamd51/schematic.png new file mode 100644 index 0000000000000000000000000000000000000000..8596f76a9c5df03c9ed5e43e2bdf15889909d927 Binary files /dev/null and b/routerboard-atsamd51/schematic.png differ diff --git a/routerboard-atsamd51/squidboard-router_fab_2019-08-30.zip b/routerboard-atsamd51/squidboard-router_fab_2019-08-30.zip new file mode 100644 index 0000000000000000000000000000000000000000..efe2640d25f33d9f3fcc6415ca9a8392ca9d5e4c Binary files /dev/null and b/routerboard-atsamd51/squidboard-router_fab_2019-08-30.zip differ diff --git a/schematic.png b/schematic.png deleted file mode 100644 index a4955ae0f020f3755feb94a9b176911e6d8be57a..0000000000000000000000000000000000000000 Binary files a/schematic.png and /dev/null differ