diff --git a/electronics/debugging_gate_driver.md b/electronics/debugging_gate_driver.md new file mode 100644 index 0000000000000000000000000000000000000000..6a5962271048eabc53f23d2413489c2bd5dc220c --- /dev/null +++ b/electronics/debugging_gate_driver.md @@ -0,0 +1,31 @@ +### Debugging Gate Drivers + +It seems like the bootstrap portion of the gate drivers is not working. + +I disconnected the gate drivers from the mosfets and noticed that they wouldn't boost over ~12V (which is their supply voltage). + +With a 100ohm resistor as the load and 20V applied to V+, these are the curves I'm seeing (with ~15mA average current draw from the supply): + +Pulse output: + +<img src="images/100ohm_pulse.png"> + +The gate of the bottom discharge FET: + +<img src="images/100ohm_bottom_gate.png"> + +The bootstrap pin of the discharge gate driver: + +<img src="images/100ohm_bottom_hb.png"> + +The drain of the discharge FET: + +<img src="images/100ohm_bottom_source.png"> + +The bootstrap pin of the charge gate driver: + +<img src="images/100ohm_top_hb.png"> + +I figured this out… I overlooked the fact that this half-bridge driver doesn't include a charge pump and relies on the HS pin (between the low and high mosfet being grounded routinely to charge): + +> With the VHB capacitor connected to HB and the HS pins, the VHB capacitor charge is refreshed every switching cycle *when HS transitions to ground*. \ No newline at end of file diff --git a/electronics/enclosure_top.dxf b/electronics/enclosure_top.dxf new file mode 100644 index 0000000000000000000000000000000000000000..bf0af06d5062fd71698cd335120b8395e48ef947 --- /dev/null +++ b/electronics/enclosure_top.dxf @@ -0,0 +1,560 @@ +0 +SECTION +2 +HEADER +9 +$INSUNITS +70 +4 +9 +$ACADVER +1 +AC1014 +9 +$HANDSEED +5 +FFFF +0 +ENDSEC +0 +SECTION +2 +TABLES +0 +TABLE +2 +VPORT +5 +8 +100 +AcDbSymbolTable +0 +ENDTAB +0 +TABLE +2 +LTYPE +5 +5 +100 +AcDbSymbolTable +70 +2 +0 +LTYPE +5 +14 +100 +AcDbSymbolTableRecord +100 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x="0.5" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="5" x="1" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +</package> </packages> </library> <library name="adafruit" urn="urn:adsk.eagle:library:420"> @@ -2280,6 +2293,30 @@ You are welcome to use this library for commercial purposes. For attribution, we </package3d> </packages3d> </library> +<library name="avago"> +<description><b>AVAGO Technologies</b><p> +www.avagotech.com<p></description> +<packages> +<package name="SOT23"> +<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.6604" width="0.1524" layer="51"/> +<wire x1="1.4224" y1="-0.6604" x2="-1.4224" y2="-0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="-0.6604" x2="-1.4224" y2="0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="0.6604" x2="1.4224" y2="0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="-0.1524" x2="-1.4224" y2="0.6604" width="0.1524" layer="21"/> +<wire x1="-1.4224" y1="0.6604" x2="-0.8636" y2="0.6604" width="0.1524" layer="21"/> +<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.1524" width="0.1524" layer="21"/> +<wire x1="0.8636" y1="0.6604" x2="1.4224" y2="0.6604" width="0.1524" layer="21"/> +<smd name="3" x="0" y="1.1" dx="1" dy="1.4" layer="1"/> +<smd name="2" x="0.95" y="-1.1" dx="1" dy="1.4" layer="1"/> +<smd name="1" x="-0.95" y="-1.1" dx="1" dy="1.4" layer="1"/> +<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text> +<text x="-1.905" y="-3.175" size="1.27" layer="27">>VALUE</text> +<rectangle x1="-0.2286" y1="0.7112" x2="0.2286" y2="1.2954" layer="51"/> +<rectangle x1="0.7112" y1="-1.2954" x2="1.1684" y2="-0.7112" layer="51"/> +<rectangle x1="-1.1684" y1="-1.2954" x2="-0.7112" y2="-0.7112" layer="51"/> +</package> +</packages> +</library> </libraries> <attributes> </attributes> @@ -2489,19 +2526,13 @@ design rules under a new name.</description> <attribute name="MANUFACTURER_PART_NUMBER" value="LM5107MAXNOPB" x="57.15" y="20.32" size="1.778" layer="27" display="off"/> <attribute name="VENDOR" value="Texas Instruments" x="57.15" y="20.32" size="1.778" layer="27" display="off"/> </element> -<element name="U3" library="lm5107_half_bridge_gate_driver" package="M08A" value="LM5107MAX/NOPB" x="57.15" y="49.784"> -<attribute name="MANUFACTURER_PART_NUMBER" value="LM5107MAXNOPB" x="57.15" y="49.784" size="1.778" layer="27" display="off"/> -<attribute name="VENDOR" value="Texas Instruments" x="57.15" y="49.784" size="1.778" layer="27" display="off"/> -</element> <element name="C1" library="fab" package="C1206FAB" value="0.1uF" x="63.246" y="21.082" rot="R270"/> <element name="R1" library="resistor" package="R1206" value="2.2ohm" x="57.15" y="24.638"/> <element name="R2" library="resistor" package="R1206" value="7.5ohm" x="67.818" y="21.082"/> <element name="C2" library="fab" package="C1206FAB" value="1uF" x="51.816" y="20.764" rot="R270"/> <element name="D1" library="fab" package="SOD123" value="" x="67.818" y="23.876"/> -<element name="C3" library="fab" package="C1206FAB" value="0.1uF" x="63.271" y="50.419" rot="R270"/> -<element name="R3" library="resistor" package="R1206" value="7.5ohm" x="67.437" y="50.292"/> -<element name="D2" library="fab" package="SOD123" value="" x="67.437" y="52.578"/> -<element name="R4" library="resistor" package="R1206" value="2.2ohm" x="57.15" y="54.102"/> +<element name="C3" library="fab" package="C1206FAB" value="1uF" x="62.3185" y="52.959" rot="R270"/> +<element name="R3" library="resistor" package="R1206" value="7.5ohm" x="65.5955" y="51.2445" rot="R90"/> <element name="C4" library="fab" package="C1206FAB" value="1uF" x="51.816" y="50.546" rot="R270"/> <element name="C5" library="resistor" package="PANASONIC_F" value="6.8uF" x="51.816" y="34.798" rot="R90"/> <element name="C6" library="resistor" package="PANASONIC_F" value="6.8uF" x="73.406" y="34.798" rot="R90"/> @@ -2583,7 +2614,8 @@ design rules under a new name.</description> <element name="J19" library="SparkFun-Connectors" library_urn="urn:adsk.eagle:library:513" package="1X01" package3d_urn="urn:adsk.eagle:package:38028/1" value="" x="22.225" y="31.75"/> <element name="J20" library="SparkFun-Connectors" library_urn="urn:adsk.eagle:library:513" package="1X05" package3d_urn="urn:adsk.eagle:package:38104/1" value="" x="4.1275" y="44.7675" rot="R90"/> <element name="C22" library="fab" package="C1206FAB" value="100nF" x="49.2125" y="20.6375" rot="R270"/> -<element name="C23" library="fab" package="C1206FAB" value="100nF" x="48.895" y="50.4825" rot="R270"/> +<element name="U$6" library="will" package="LTC7001-10MSOP" value="LTC7001" x="57.15" y="50.8" rot="R270"/> +<element name="D2" library="avago" package="SOT23" value="HSMS-2850" x="57.4675" y="54.2925" rot="R270"/> </elements> <signals> <signal name="N$2" class="2"> @@ -2625,7 +2657,7 @@ design rules under a new name.</description> <contactref element="J12" pad="1"/> <wire x1="26.9875" y1="20.955" x2="24.13" y2="20.955" width="0.3048" layer="1"/> </signal> -<signal name="VC" class="1"> +<signal name="VC" class="2"> <contactref element="C5" pad="+"/> <contactref element="C6" pad="+"/> <contactref element="C7" pad="+"/> @@ -2716,11 +2748,19 @@ design rules under a new name.</description> <via x="85.725" y="4.7625" extent="1-16" drill="0.889"/> <via x="86.995" y="26.67" extent="1-16" drill="0.889"/> <via x="86.6775" y="32.7025" extent="1-16" drill="0.889"/> +<contactref element="U$6" pad="8"/> <contactref element="C3" pad="2"/> -<contactref element="U3" pad="6"/> -<wire x1="59.6138" y1="49.149" x2="60.706" y2="49.149" width="0.6096" layer="1"/> -<wire x1="60.706" y1="49.149" x2="63.271" y2="48.768" width="0.6096" layer="1"/> -<wire x1="66.3575" y1="41.91" x2="63.271" y2="48.768" width="0" layer="19" extent="1-1"/> +<wire x1="59.25" y1="50.8" x2="61.595" y2="50.8" width="0.254" layer="1"/> +<wire x1="61.595" y1="50.8" x2="61.6835" y2="50.8885" width="0.254" layer="1"/> +<wire x1="61.6835" y1="50.8885" x2="62.3185" y2="51.308" width="0.254" layer="1"/> +<wire x1="62.3185" y1="51.308" x2="62.992" y2="51.308" width="0.3048" layer="1"/> +<wire x1="62.992" y1="51.308" x2="63.0301" y2="51.2191" width="0.3048" layer="1"/> +<wire x1="63.0301" y1="51.2191" x2="67.4878" y2="51.2318" width="0.3048" layer="1"/> +<wire x1="67.4878" y1="51.2318" x2="67.9196" y2="50.8254" width="0.3048" layer="1"/> +<wire x1="67.9196" y1="50.8254" x2="68.58" y2="50.165" width="0.6096" layer="1"/> +<wire x1="68.58" y1="50.165" x2="71.12" y2="47.625" width="1.27" layer="1"/> +<wire x1="71.12" y1="47.625" x2="73.6" y2="47.625" width="1.27" layer="1"/> +<wire x1="73.6" y1="47.625" x2="73.727" y2="47.752" width="0.3048" layer="1"/> </signal> <signal name="GND"> <contactref element="J6" pad="GND"/> @@ -2904,37 +2944,24 @@ design rules under a new name.</description> <via x="66.04" y="83.185" extent="1-16" drill="0.889"/> <via x="71.4375" y="83.185" extent="1-16" drill="0.889"/> </signal> -<signal name="N$8" class="2"> -<contactref element="C3" pad="1"/> -<contactref element="U3" pad="8"/> -<contactref element="R4" pad="2"/> -<wire x1="59.6138" y1="51.689" x2="58.572" y2="51.689" width="0.6096" layer="1"/> -<wire x1="58.572" y1="51.689" x2="58.572" y2="54.102" width="0.6096" layer="1"/> -<wire x1="59.6138" y1="51.689" x2="60.706" y2="51.689" width="0.6096" layer="1"/> -<wire x1="60.706" y1="51.689" x2="63.271" y2="52.07" width="0.6096" layer="1"/> -</signal> <signal name="N$9"> <contactref element="R3" pad="2"/> -<contactref element="D2" pad="ANODE"/> <contactref element="T1" pad="1"/> -<wire x1="69.137" y1="52.578" x2="69.137" y2="50.292" width="0.6096" layer="1"/> -<wire x1="69.137" y1="50.292" x2="68.859" y2="50.292" width="0.6096" layer="1"/> <wire x1="73.727" y1="52.832" x2="73.473" y2="52.578" width="1.27" layer="1" curve="-90"/> -<wire x1="73.473" y1="52.578" x2="69.137" y2="52.578" width="1.27" layer="1"/> +<wire x1="65.5955" y1="52.6665" x2="73.727" y2="52.5145" width="1.27" layer="1"/> +<wire x1="73.727" y1="52.5145" x2="73.727" y2="52.832" width="1.27" layer="1"/> </signal> <signal name="N$10" class="2"> <contactref element="R3" pad="1"/> -<contactref element="D2" pad="CATHODE"/> -<contactref element="U3" pad="7"/> -<wire x1="59.6138" y1="50.419" x2="65.737" y2="50.419" width="0.3048" layer="1"/> -<wire x1="65.737" y1="50.419" x2="66.015" y2="50.419" width="0.3302" layer="1"/> -<wire x1="66.04" y1="50.419" x2="66.015" y2="50.419" width="0.3302" layer="1"/> -<wire x1="66.015" y1="50.419" x2="66.015" y2="50.292" width="0.6096" layer="1"/> -<wire x1="65.737" y1="52.578" x2="65.737" y2="50.419" width="0.6096" layer="1"/> -<wire x1="65.737" y1="50.419" x2="66.04" y2="50.419" width="0.6096" layer="1"/> +<contactref element="U$6" pad="7"/> +<contactref element="U$6" pad="6"/> +<wire x1="65.0875" y1="49.8475" x2="59.25" y2="49.8475" width="0.6096" layer="1"/> +<wire x1="59.25" y1="50.3" x2="59.25" y2="49.8475" width="0.2413" layer="1"/> +<wire x1="65.5955" y1="49.8225" x2="65.1125" y2="49.8225" width="0.3048" layer="1"/> +<wire x1="65.1125" y1="49.8225" x2="65.0875" y2="49.8475" width="0.3048" layer="1"/> +<wire x1="59.25" y1="49.8475" x2="59.25" y2="49.8" width="0" layer="19" extent="1-1"/> </signal> <signal name="CHARGE" class="2"> -<contactref element="U3" pad="2"/> <contactref element="IC1" pad="16"/> <via x="23.495" y="47.3075" extent="1-16" drill="0.889"/> <wire x1="23.495" y1="47.3075" x2="13.335" y2="37.1475" width="0.3048" layer="16"/> @@ -2946,9 +2973,14 @@ design rules under a new name.</description> <wire x1="11.9" y1="32.935" x2="11.9" y2="34.455" width="0.3048" layer="1"/> <wire x1="11.9" y1="34.455" x2="11.1125" y2="35.2425" width="0.3048" layer="1"/> <contactref element="J13" pad="1"/> -<wire x1="54.6862" y1="50.419" x2="29.845" y2="50.419" width="0.3048" layer="1"/> <wire x1="29.845" y1="50.419" x2="26.6065" y2="50.419" width="0.3048" layer="1"/> <wire x1="34.29" y1="50.4825" x2="29.845" y2="50.419" width="0.3048" layer="1"/> +<contactref element="U$6" pad="4"/> +<wire x1="55.05" y1="50.3" x2="53.5225" y2="50.3" width="0.2413" layer="1"/> +<wire x1="53.5225" y1="50.3" x2="53.34" y2="50.4825" width="0.2413" layer="1"/> +<wire x1="53.34" y1="50.4825" x2="46.99" y2="50.4825" width="0.3048" layer="1"/> +<wire x1="46.99" y1="50.4825" x2="45.72" y2="50.4825" width="0.3048" layer="1"/> +<wire x1="34.29" y1="50.4825" x2="45.72" y2="50.4825" width="0.3048" layer="1"/> </signal> <signal name="OUTPUT" class="1"> <contactref element="T2" pad="3"/> @@ -2986,18 +3018,11 @@ design rules under a new name.</description> </signal> <signal name="12V" class="2"> <contactref element="J6" pad="VIN0"/> -<contactref element="R4" pad="1"/> <contactref element="C4" pad="1"/> -<contactref element="U3" pad="1"/> -<wire x1="54.6862" y1="51.689" x2="53.978" y2="51.689" width="0.6096" layer="1"/> -<wire x1="53.978" y1="51.689" x2="51.816" y2="52.197" width="0.6096" layer="1"/> -<wire x1="54.6862" y1="51.689" x2="55.728" y2="51.689" width="0.6096" layer="1"/> -<wire x1="55.728" y1="51.689" x2="55.728" y2="54.102" width="0.6096" layer="1"/> <contactref element="U2" pad="1"/> <contactref element="R1" pad="1"/> <contactref element="C2" pad="1"/> <wire x1="40.64" y1="80.63" x2="40.625" y2="80.645" width="1.27" layer="1"/> -<wire x1="51.816" y1="52.197" x2="44.45" y2="52.2635" width="1.27" layer="1"/> <wire x1="44.45" y1="52.3875" x2="44.45" y2="52.2635" width="1.27" layer="1"/> <wire x1="54.6862" y1="22.225" x2="55.728" y2="23.2668" width="0.6096" layer="1"/> <wire x1="55.728" y1="23.2668" x2="55.728" y2="24.638" width="0.6096" layer="1"/> @@ -3031,9 +3056,17 @@ design rules under a new name.</description> <wire x1="24.765" y1="66.827" x2="23.9323" y2="67.6597" width="0.6096" layer="1"/> <wire x1="23.9323" y1="67.6597" x2="23.9323" y2="69.215" width="0.6096" layer="1"/> <contactref element="C22" pad="1"/> -<contactref element="C23" pad="1"/> -<wire x1="51.816" y1="52.197" x2="48.895" y2="52.1335" width="0" layer="19" extent="1-1"/> -<wire x1="49.2125" y1="22.2885" x2="51.816" y2="22.415" width="0" layer="19" extent="1-1"/> +<contactref element="U$6" pad="1"/> +<contactref element="D2" pad="1"/> +<wire x1="51.816" y1="52.197" x2="51.816" y2="53.086" width="0.6096" layer="1"/> +<wire x1="51.816" y1="53.086" x2="53.9725" y2="55.2425" width="0.6096" layer="1"/> +<wire x1="53.9725" y1="55.2425" x2="56.3675" y2="55.2425" width="0.6096" layer="1"/> +<wire x1="55.05" y1="51.8" x2="55.05" y2="51.7525" width="0.2413" layer="1"/> +<wire x1="51.816" y1="51.7525" x2="51.816" y2="52.197" width="0.2413" layer="1"/> +<wire x1="55.05" y1="51.7525" x2="51.816" y2="51.7525" width="0.2413" layer="1"/> +<wire x1="44.45" y1="52.3875" x2="51.6255" y2="52.3875" width="0.6096" layer="1"/> +<wire x1="51.6255" y1="52.3875" x2="51.816" y2="52.197" width="0.6096" layer="1"/> +<wire x1="51.816" y1="22.415" x2="49.2125" y2="22.2885" width="0" layer="19" extent="1-1"/> </signal> <signal name="N$13" class="2"> <contactref element="U4" pad="6"/> @@ -3478,9 +3511,6 @@ design rules under a new name.</description> <contactref element="U2" pad="4"/> <contactref element="C2" pad="2"/> <contactref element="C4" pad="2"/> -<contactref element="U3" pad="4"/> -<wire x1="54.6862" y1="47.879" x2="53.083" y2="47.879" width="0.6096" layer="1"/> -<wire x1="54.6862" y1="47.879" x2="52.07" y2="47.879" width="0.6096" layer="1"/> <wire x1="52.07" y1="47.879" x2="51.816" y2="47.879" width="0.6096" layer="1"/> <wire x1="51.816" y1="48.895" x2="51.816" y2="47.879" width="0.6096" layer="1"/> <via x="52.07" y="43.815" extent="1-16" drill="0.889"/> @@ -3665,14 +3695,36 @@ design rules under a new name.</description> <via x="54.9275" y="4.1275" extent="1-16" drill="0.889"/> <via x="60.6425" y="4.1275" extent="1-16" drill="0.889"/> <via x="60.96" y="82.8675" extent="1-16" drill="0.889"/> -<contactref element="U3" pad="3"/> <contactref element="U2" pad="3"/> <contactref element="C22" pad="2"/> -<contactref element="C23" pad="2"/> -<wire x1="54.6862" y1="47.879" x2="54.6862" y2="49.149" width="0" layer="19" extent="1-1"/> -<wire x1="54.6862" y1="19.685" x2="54.6862" y2="18.415" width="0" layer="19" extent="1-1"/> +<contactref element="U$6" pad="3"/> +<contactref element="U$6" pad="P$1"/> +<contactref element="U$6" pad="5"/> +<wire x1="57.15" y1="50.8" x2="55.05" y2="50.8" width="0.2413" layer="1"/> +<wire x1="51.816" y1="48.895" x2="55.0545" y2="48.9618" width="0.2413" layer="1"/> +<wire x1="55.0545" y1="48.9618" x2="55.05" y2="49.8" width="0.2413" layer="1"/> +<wire x1="55.05" y1="49.2125" x2="55.05" y2="49.8" width="0.2413" layer="1"/> +<wire x1="55.05" y1="47.625" x2="55.05" y2="47.9425" width="0.2413" layer="1"/> +<wire x1="55.05" y1="47.625" x2="55.245" y2="47.625" width="0.2413" layer="1"/> +<wire x1="55.05" y1="47.9425" x2="55.05" y2="48.26" width="1.27" layer="1"/> +<wire x1="55.05" y1="48.26" x2="55.05" y2="49.2125" width="1.27" layer="1"/> +<wire x1="51.816" y1="48.895" x2="52.4891" y2="48.9331" width="1.27" layer="1"/> +<wire x1="52.4891" y1="48.9331" x2="54.9656" y2="48.9331" width="1.27" layer="1"/> +<wire x1="51.816" y1="48.895" x2="52.451" y2="48.26" width="1.27" layer="1"/> +<wire x1="52.451" y1="48.26" x2="55.05" y2="48.26" width="1.27" layer="1"/> +<wire x1="51.816" y1="48.895" x2="50.5968" y2="47.6758" width="1.27" layer="1"/> +<wire x1="50.5968" y1="47.6758" x2="49.3014" y2="47.6758" width="1.27" layer="1"/> +<wire x1="57.15" y1="50.8" x2="57.15" y2="49.53" width="1.27" layer="1"/> +<wire x1="57.15" y1="49.53" x2="57.15" y2="47.752" width="1.27" layer="1"/> +<wire x1="57.15" y1="47.752" x2="57.0992" y2="47.7012" width="1.27" layer="1"/> +<wire x1="57.0992" y1="47.7012" x2="56.6674" y2="48.133" width="1.27" layer="1"/> +<wire x1="56.6674" y1="48.133" x2="56.6674" y2="48.8442" width="1.27" layer="1"/> +<wire x1="56.6674" y1="48.8442" x2="55.6342" y2="48.8442" width="1.27" layer="1"/> +<wire x1="55.6342" y1="48.8442" x2="55.05" y2="48.26" width="1.27" layer="1"/> +<wire x1="55.05" y1="49.2125" x2="56.8325" y2="49.2125" width="1.27" layer="1"/> +<wire x1="56.8325" y1="49.2125" x2="57.15" y2="49.53" width="1.27" layer="1"/> +<wire x1="54.6862" y1="18.415" x2="54.6862" y2="19.685" width="0" layer="19" extent="1-1"/> <wire x1="49.2125" y1="18.9865" x2="51.7525" y2="19.047" width="0" layer="19" extent="1-1"/> -<wire x1="48.895" y1="48.8315" x2="51.816" y2="48.895" width="0" layer="19" extent="1-1"/> </signal> <signal name="VIN"> <contactref element="JP1" pad="2"/> @@ -3757,6 +3809,17 @@ design rules under a new name.</description> <wire x1="4.1275" y1="44.7675" x2="7.153475" y2="44.7675" width="0.3048" layer="1"/> <wire x1="7.153475" y1="44.7675" x2="8.285375" y2="45.8994" width="0.3048" layer="1"/> </signal> +<signal name="N$1" class="2"> +<contactref element="U$6" pad="9"/> +<contactref element="C3" pad="1"/> +<contactref element="D2" pad="3"/> +<wire x1="59.25" y1="51.3" x2="60.2695" y2="51.3" width="0.2413" layer="1"/> +<wire x1="58.5675" y1="54.2925" x2="60.6425" y2="54.2925" width="0.6096" layer="1"/> +<wire x1="60.6425" y1="54.2925" x2="62.3185" y2="54.2925" width="0.6096" layer="1"/> +<wire x1="62.3185" y1="54.2925" x2="62.3185" y2="54.61" width="0.254" layer="1"/> +<wire x1="60.2695" y1="51.3" x2="60.6425" y2="51.6175" width="0.2413" layer="1"/> +<wire x1="60.6425" y1="51.6175" x2="60.6425" y2="54.2925" width="0.3048" layer="1"/> +</signal> </signals> <errors> <approved hash="3,1,34b8224423a0355c"/> diff --git a/electronics/pulseGenerator_v2.cutout.png b/electronics/pulseGenerator_v2.cutout.png new file mode 100644 index 0000000000000000000000000000000000000000..425b0c0ded5a943858b92291e7933a65a4c0af7d Binary files /dev/null and b/electronics/pulseGenerator_v2.cutout.png differ diff --git a/electronics/pulseGenerator_v2.holes.png b/electronics/pulseGenerator_v2.holes.png new file mode 100644 index 0000000000000000000000000000000000000000..f5fc0e2ec4810e3cce6bfb5a1e187f230c021218 Binary files /dev/null and b/electronics/pulseGenerator_v2.holes.png differ diff --git a/electronics/pulseGenerator_v2.sch b/electronics/pulseGenerator_v2.sch index 374b83610df89546085417e0571884994d11a812..c7538b5669e2c460e5ca2cca410a58e80899d212 100644 --- a/electronics/pulseGenerator_v2.sch +++ b/electronics/pulseGenerator_v2.sch @@ -8,34 +8,34 @@ </settings> <grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> <layers> -<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/> -<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/> -<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/> -<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/> -<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/> -<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/> -<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/> -<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/> -<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/> -<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/> -<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/> -<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/> -<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/> -<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/> -<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/> -<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="no"/> -<layer number="17" name="Pads" color="2" fill="1" visible="no" active="no"/> -<layer number="18" name="Vias" color="2" fill="1" visible="no" active="no"/> -<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="no"/> -<layer number="20" name="Dimension" color="24" fill="1" visible="no" active="no"/> -<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="no"/> -<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="no"/> -<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="no"/> -<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="no"/> -<layer number="25" name="tNames" color="7" fill="1" visible="no" active="no"/> -<layer number="26" name="bNames" color="7" fill="1" visible="no" active="no"/> -<layer number="27" name="tValues" color="7" fill="1" visible="no" active="no"/> -<layer number="28" name="bValues" color="7" fill="1" visible="no" active="no"/> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="no"/> +<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="no"/> +<layer number="3" name="Route3" color="4" fill="3" visible="yes" active="no"/> +<layer number="4" name="Route4" color="1" fill="4" visible="yes" active="no"/> +<layer number="5" name="Route5" color="4" fill="4" visible="yes" active="no"/> +<layer number="6" name="Route6" color="1" fill="8" visible="yes" active="no"/> +<layer number="7" name="Route7" color="4" fill="8" visible="yes" active="no"/> +<layer number="8" name="Route8" color="1" fill="2" visible="yes" active="no"/> +<layer number="9" name="Route9" color="4" fill="2" visible="yes" active="no"/> +<layer number="10" name="Route10" color="1" fill="7" visible="yes" active="no"/> +<layer number="11" name="Route11" color="4" fill="7" visible="yes" active="no"/> +<layer number="12" name="Route12" color="1" fill="5" visible="yes" active="no"/> +<layer number="13" name="Route13" color="4" fill="5" visible="yes" active="no"/> +<layer number="14" name="Route14" color="1" fill="6" visible="yes" active="no"/> +<layer number="15" name="Route15" color="4" fill="6" visible="yes" active="no"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="no"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="no"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="no"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="no"/> +<layer number="20" name="Dimension" color="24" fill="1" visible="yes" active="no"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="no"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="no"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="no"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="no"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="no"/> +<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="no"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="no"/> +<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="no"/> <layer number="29" name="tStop" color="7" fill="3" visible="no" active="no"/> <layer number="30" name="bStop" color="7" fill="6" visible="no" active="no"/> <layer number="31" name="tCream" color="7" fill="4" visible="no" active="no"/> @@ -44,8 +44,8 @@ <layer number="34" name="bFinish" color="6" fill="6" visible="no" active="no"/> <layer number="35" name="tGlue" color="7" fill="4" visible="no" active="no"/> <layer number="36" name="bGlue" color="7" fill="5" visible="no" active="no"/> -<layer number="37" name="tTest" color="7" fill="1" visible="no" active="no"/> -<layer number="38" name="bTest" color="7" fill="1" visible="no" active="no"/> +<layer number="37" name="tTest" color="7" fill="1" visible="yes" active="no"/> +<layer number="38" name="bTest" color="7" fill="1" visible="yes" active="no"/> <layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="no"/> <layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="no"/> <layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="no"/> @@ -53,19 +53,19 @@ <layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="no"/> <layer number="44" name="Drills" color="7" fill="1" visible="no" active="no"/> <layer number="45" name="Holes" color="7" fill="1" visible="no" active="no"/> -<layer number="46" name="Milling" color="3" fill="1" visible="no" active="no"/> -<layer number="47" name="Measures" color="7" fill="1" visible="no" active="no"/> -<layer number="48" name="Document" color="7" fill="1" visible="no" active="no"/> -<layer number="49" name="Reference" color="7" fill="1" visible="no" active="no"/> -<layer number="50" name="dxf" color="7" fill="1" visible="no" active="no"/> -<layer number="51" name="tDocu" color="7" fill="1" visible="no" active="no"/> -<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="no"/> -<layer number="53" name="tGND_GNDA" color="7" fill="9" visible="no" active="no"/> -<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="no" active="no"/> -<layer number="56" name="wert" color="7" fill="1" visible="no" active="no"/> -<layer number="57" name="tCAD" color="7" fill="1" visible="no" active="no"/> -<layer number="59" name="tCarbon" color="7" fill="1" visible="no" active="no"/> -<layer number="60" name="bCarbon" color="7" fill="1" visible="no" active="no"/> +<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="no"/> +<layer number="47" name="Measures" color="7" fill="1" visible="yes" active="no"/> +<layer number="48" name="Document" color="7" fill="1" visible="yes" active="no"/> +<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="no"/> +<layer number="50" name="dxf" color="7" fill="1" visible="yes" active="no"/> +<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="no"/> +<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="no"/> +<layer number="53" name="tGND_GNDA" color="7" fill="9" visible="yes" active="no"/> +<layer number="54" name="bGND_GNDA" color="1" fill="9" visible="yes" active="no"/> +<layer number="56" name="wert" color="7" fill="1" visible="yes" active="no"/> +<layer number="57" name="tCAD" color="7" fill="1" visible="yes" active="no"/> +<layer number="59" name="tCarbon" color="7" fill="1" visible="yes" active="no"/> +<layer number="60" name="bCarbon" color="7" fill="1" visible="yes" active="no"/> <layer number="88" name="SimResults" color="9" fill="1" visible="yes" active="yes"/> <layer number="89" name="SimProbes" color="9" fill="1" visible="yes" active="yes"/> <layer number="90" name="Modules" color="5" fill="1" visible="yes" active="yes"/> @@ -17455,6 +17455,19 @@ Also note, the SNAP packages are for using a snappable style connector. We sell <text x="-2.1336" y="1.3716" size="1.27" layer="21" ratio="6" rot="SR0">*</text> <text x="-3.2766" y="-0.635" size="1.27" layer="25" ratio="6" rot="SR0">>Name</text> </package> +<package name="LTC7001-10MSOP"> +<smd name="P$1" x="0" y="0" dx="1.88" dy="1.68" layer="1"/> +<smd name="8" x="0" y="2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="3" x="0" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="9" x="-0.5" y="2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="10" x="-1" y="2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="7" x="0.5" y="2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="6" x="1" y="2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="2" x="-0.5" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="1" x="-1" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="4" x="0.5" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +<smd name="5" x="1" y="-2.1" dx="0.24" dy="0.889" layer="1"/> +</package> </packages> <symbols> <symbol name="IND_4PIN"> @@ -17519,6 +17532,22 @@ Also note, the SNAP packages are for using a snappable style connector. We sell <text x="15.5956" y="9.1186" size="2.0828" layer="95" ratio="6" rot="SR0">>Name</text> <text x="14.9606" y="6.5786" size="2.0828" layer="96" ratio="6" rot="SR0">>Value</text> </symbol> +<symbol name="LTC7001"> +<pin name="VCC" x="-10.16" y="5.08" length="middle"/> +<pin name="VCCUV" x="-10.16" y="2.54" length="middle"/> +<pin name="GND" x="-10.16" y="0" length="middle"/> +<pin name="INP" x="-10.16" y="-2.54" length="middle"/> +<pin name="OVLO" x="-10.16" y="-5.08" length="middle"/> +<pin name="TGDN" x="15.24" y="-5.08" length="middle" rot="R180"/> +<pin name="TGUP" x="15.24" y="-2.54" length="middle" rot="R180"/> +<pin name="TS" x="15.24" y="0" length="middle" rot="R180"/> +<pin name="BST" x="15.24" y="2.54" length="middle" rot="R180"/> +<pin name="NC" x="15.24" y="5.08" length="middle" rot="R180"/> +<wire x1="-5.08" y1="7.62" x2="-5.08" y2="-7.62" width="0.254" layer="94"/> +<wire x1="-5.08" y1="-7.62" x2="10.16" y2="-7.62" width="0.254" layer="94"/> +<wire x1="10.16" y1="-7.62" x2="10.16" y2="7.62" width="0.254" layer="94"/> +<wire x1="10.16" y1="7.62" x2="-5.08" y2="7.62" width="0.254" layer="94"/> +</symbol> </symbols> <devicesets> <deviceset name="SRU5018-150Y" prefix="L"> @@ -17710,6 +17739,30 @@ Also note, the SNAP packages are for using a snappable style connector. We sell </device> </devices> </deviceset> +<deviceset name="LTC7001"> +<gates> +<gate name="G$1" symbol="LTC7001" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LTC7001-10MSOP"> +<connects> +<connect gate="G$1" pin="BST" pad="9"/> +<connect gate="G$1" pin="GND" pad="3 P$1"/> +<connect gate="G$1" pin="INP" pad="4"/> +<connect gate="G$1" pin="NC" pad="10"/> +<connect gate="G$1" pin="OVLO" pad="5"/> +<connect gate="G$1" pin="TGDN" pad="6"/> +<connect gate="G$1" pin="TGUP" pad="7"/> +<connect gate="G$1" pin="TS" pad="8"/> +<connect gate="G$1" pin="VCC" pad="1"/> +<connect gate="G$1" pin="VCCUV" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> </devicesets> </library> <library name="adafruit" urn="urn:adsk.eagle:library:420"> @@ -18559,6 +18612,65 @@ You are welcome to use this library for commercial purposes. For attribution, we </deviceset> </devicesets> </library> +<library name="avago"> +<description><b>AVAGO Technologies</b><p> +www.avagotech.com<p></description> +<packages> +<package name="SOT23"> +<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.6604" width="0.1524" layer="51"/> +<wire x1="1.4224" y1="-0.6604" x2="-1.4224" y2="-0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="-0.6604" x2="-1.4224" y2="0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="0.6604" x2="1.4224" y2="0.6604" width="0.1524" layer="51"/> +<wire x1="-1.4224" y1="-0.1524" x2="-1.4224" y2="0.6604" width="0.1524" layer="21"/> +<wire x1="-1.4224" y1="0.6604" x2="-0.8636" y2="0.6604" width="0.1524" layer="21"/> +<wire x1="1.4224" y1="0.6604" x2="1.4224" y2="-0.1524" width="0.1524" layer="21"/> +<wire x1="0.8636" y1="0.6604" x2="1.4224" y2="0.6604" width="0.1524" layer="21"/> +<smd name="3" x="0" y="1.1" dx="1" dy="1.4" layer="1"/> +<smd name="2" x="0.95" y="-1.1" dx="1" dy="1.4" layer="1"/> +<smd name="1" x="-0.95" y="-1.1" dx="1" dy="1.4" layer="1"/> +<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text> +<text x="-1.905" y="-3.175" size="1.27" layer="27">>VALUE</text> +<rectangle x1="-0.2286" y1="0.7112" x2="0.2286" y2="1.2954" layer="51"/> +<rectangle x1="0.7112" y1="-1.2954" x2="1.1684" y2="-0.7112" layer="51"/> +<rectangle x1="-1.1684" y1="-1.2954" x2="-0.7112" y2="-0.7112" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="D"> +<wire x1="-1.27" y1="-1.27" x2="1.27" y2="0" width="0.254" layer="94"/> +<wire x1="1.27" y1="0" x2="-1.27" y2="1.27" width="0.254" layer="94"/> +<wire x1="1.27" y1="1.27" x2="1.27" y2="0" width="0.254" layer="94"/> +<wire x1="-1.27" y1="1.27" x2="-1.27" y2="-1.27" width="0.254" layer="94"/> +<wire x1="1.27" y1="0" x2="1.27" y2="-1.27" width="0.254" layer="94"/> +<text x="2.54" y="0.4826" size="1.778" layer="95">>NAME</text> +<text x="2.54" y="-2.3114" size="1.778" layer="96">>VALUE</text> +<pin name="A" x="-2.54" y="0" visible="off" length="short" direction="pas"/> +<pin name="C" x="2.54" y="0" visible="off" length="short" direction="pas" rot="R180"/> +<text x="-2.54" y="0" size="0.4064" layer="99" align="center">SpiceOrder 1</text> +<text x="2.54" y="0" size="0.4064" layer="99" align="center">SpiceOrder 2</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="HSMS-2850" prefix="D"> +<description><b>Surface Mount Microwave Schottky Detector Diodes</b><p> +Source: <a href="http://www.farnell.com/datasheets/461166.pdf"> Data sheet </a></description> +<gates> +<gate name="G$1" symbol="D" x="0" y="0"/> +</gates> +<devices> +<device name="" package="SOT23"> +<connects> +<connect gate="G$1" pin="A" pad="1"/> +<connect gate="G$1" pin="C" pad="3"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> </libraries> <attributes> </attributes> @@ -18580,16 +18692,13 @@ You are welcome to use this library for commercial purposes. For attribution, we <part name="T2" library="SparkFun-DiscreteSemi" library_urn="urn:adsk.eagle:library:514" deviceset="MOSFET-NCH" device="-PSMN7R0" package3d_urn="urn:adsk.eagle:package:38457/1" value="100A/100V/6.8mΩ"/> <part name="SUPPLY2" library="supply2" deviceset="V+" device="" value="100V"/> <part name="U2" library="lm5107_half_bridge_gate_driver" deviceset="LM5107MAX/NOPB" device=""/> -<part name="U3" library="lm5107_half_bridge_gate_driver" deviceset="LM5107MAX/NOPB" device=""/> <part name="C1" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="0.1uF"/> <part name="R1" library="resistor" deviceset="R-US_" device="R1206" value="2.2ohm"/> <part name="R2" library="resistor" deviceset="R-US_" device="R1206" value="7.5ohm"/> <part name="C2" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="1uF"/> <part name="D1" library="fab" deviceset="DIODE" device="SOD123"/> -<part name="C3" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="0.1uF"/> +<part name="C3" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="1uF"/> <part name="R3" library="resistor" deviceset="R-US_" device="R1206" value="7.5ohm"/> -<part name="D2" library="fab" deviceset="DIODE" device="SOD123"/> -<part name="R4" library="resistor" deviceset="R-US_" device="R1206" value="2.2ohm"/> <part name="C4" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="1uF"/> <part name="C5" library="resistor" deviceset="CPOL-US" device="F" value="6.8uF"/> <part name="C6" library="resistor" deviceset="CPOL-US" device="F" value="6.8uF"/> @@ -18686,7 +18795,8 @@ You are welcome to use this library for commercial purposes. For attribution, we <part name="J19" library="SparkFun-Connectors" library_urn="urn:adsk.eagle:library:513" deviceset="CONN_01" device="" package3d_urn="urn:adsk.eagle:package:38028/1"/> <part name="J20" library="SparkFun-Connectors" library_urn="urn:adsk.eagle:library:513" deviceset="CONN_05" device="" package3d_urn="urn:adsk.eagle:package:38104/1"/> <part name="C22" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="100nF"/> -<part name="C23" library="fab" deviceset="CAP-UNPOLARIZED" device="FAB" value="100nF"/> +<part name="U$6" library="will" deviceset="LTC7001" device=""/> +<part name="D2" library="avago" deviceset="HSMS-2850" device=""/> </parts> <sheets> <sheet> @@ -18723,16 +18833,13 @@ You are welcome to use this library for commercial purposes. For attribution, we <instance part="T2" gate="NMOS" x="391.16" y="35.56"/> <instance part="SUPPLY2" gate="1" x="393.7" y="111.76"/> <instance part="U2" gate="A" x="299.72" y="35.56"/> -<instance part="U3" gate="A" x="299.72" y="81.28"/> <instance part="C1" gate=">NAME" x="360.68" y="33.02" rot="R270"/> <instance part="R1" gate="G$1" x="314.96" y="48.26"/> <instance part="R2" gate="G$1" x="378.46" y="33.02"/> <instance part="C2" gate=">NAME" x="294.64" y="30.48" rot="R270"/> <instance part="D1" gate="G$1" x="378.46" y="38.1" rot="R180"/> -<instance part="C3" gate=">NAME" x="360.68" y="78.74" rot="R270"/> +<instance part="C3" gate=">NAME" x="345.44" y="78.74" rot="R270"/> <instance part="R3" gate="G$1" x="378.46" y="78.74"/> -<instance part="D2" gate="G$1" x="378.46" y="83.82" rot="R180"/> -<instance part="R4" gate="G$1" x="314.96" y="93.98"/> <instance part="C4" gate=">NAME" x="294.64" y="76.2" rot="R270"/> <instance part="C5" gate="G$1" x="401.32" y="55.88"/> <instance part="C6" gate="G$1" x="411.48" y="55.88"/> @@ -18838,7 +18945,8 @@ You are welcome to use this library for commercial purposes. For attribution, we <instance part="J19" gate="G$1" x="91.44" y="170.18" rot="R270"/> <instance part="J20" gate="G$1" x="223.52" y="17.78" rot="R180"/> <instance part="C22" gate=">NAME" x="299.72" y="30.48" rot="R270"/> -<instance part="C23" gate=">NAME" x="299.72" y="76.2" rot="R270"/> +<instance part="U$6" gate="G$1" x="322.58" y="81.28"/> +<instance part="D2" gate="G$1" x="332.74" y="93.98"/> </instances> <busses> </busses> @@ -18893,7 +19001,7 @@ You are welcome to use this library for commercial purposes. For attribution, we <label x="180.34" y="50.8" size="1.778" layer="95"/> </segment> </net> -<net name="VC" class="1"> +<net name="VC" class="2"> <segment> <wire x1="393.7" y1="58.42" x2="401.32" y2="58.42" width="0.1524" layer="91"/> <label x="396.24" y="58.42" size="1.778" layer="95"/> @@ -18909,11 +19017,13 @@ You are welcome to use this library for commercial purposes. For attribution, we <pinref part="T1" gate="NMOS" pin="S"/> <wire x1="393.7" y1="58.42" x2="393.7" y2="76.2" width="0.1524" layer="91"/> <junction x="393.7" y="58.42"/> +<pinref part="U$6" gate="G$1" pin="TS"/> +<wire x1="337.82" y1="81.28" x2="342.9" y2="81.28" width="0.1524" layer="91"/> +<wire x1="342.9" y1="81.28" x2="342.9" y2="76.2" width="0.1524" layer="91"/> <pinref part="C3" gate=">NAME" pin="2"/> -<wire x1="353.06" y1="76.2" x2="360.68" y2="76.2" width="0.1524" layer="91"/> -<pinref part="U3" gate="A" pin="HS"/> -<wire x1="360.68" y1="76.2" x2="393.7" y2="76.2" width="0.1524" layer="91"/> -<junction x="360.68" y="76.2"/> +<wire x1="342.9" y1="76.2" x2="345.44" y2="76.2" width="0.1524" layer="91"/> +<wire x1="345.44" y1="76.2" x2="393.7" y2="76.2" width="0.1524" layer="91"/> +<junction x="345.44" y="76.2"/> <junction x="393.7" y="76.2"/> </segment> <segment> @@ -19080,50 +19190,31 @@ You are welcome to use this library for commercial purposes. For attribution, we <junction x="436.88" y="96.52"/> </segment> </net> -<net name="N$8" class="2"> -<segment> -<pinref part="C3" gate=">NAME" pin="1"/> -<pinref part="U3" gate="A" pin="HB"/> -<pinref part="R4" gate="G$1" pin="2"/> -<wire x1="353.06" y1="81.28" x2="353.06" y2="83.82" width="0.1524" layer="91"/> -<wire x1="353.06" y1="83.82" x2="353.06" y2="93.98" width="0.1524" layer="91"/> -<wire x1="353.06" y1="93.98" x2="320.04" y2="93.98" width="0.1524" layer="91"/> -<wire x1="360.68" y1="83.82" x2="353.06" y2="83.82" width="0.1524" layer="91"/> -<junction x="353.06" y="83.82"/> -</segment> -</net> <net name="N$9" class="0"> <segment> <pinref part="R3" gate="G$1" pin="2"/> <wire x1="383.54" y1="78.74" x2="386.08" y2="78.74" width="0.1524" layer="91"/> -<pinref part="D2" gate="G$1" pin="A"/> -<wire x1="386.08" y1="78.74" x2="388.62" y2="78.74" width="0.1524" layer="91"/> -<wire x1="381" y1="83.82" x2="386.08" y2="83.82" width="0.1524" layer="91"/> -<wire x1="386.08" y1="83.82" x2="386.08" y2="78.74" width="0.1524" layer="91"/> -<junction x="386.08" y="78.74"/> <pinref part="T1" gate="NMOS" pin="G"/> </segment> </net> <net name="N$10" class="2"> <segment> <pinref part="R3" gate="G$1" pin="1"/> -<wire x1="373.38" y1="78.74" x2="368.3" y2="78.74" width="0.1524" layer="91"/> -<pinref part="D2" gate="G$1" pin="C"/> -<wire x1="368.3" y1="78.74" x2="353.06" y2="78.74" width="0.1524" layer="91"/> -<wire x1="368.3" y1="78.74" x2="368.3" y2="83.82" width="0.1524" layer="91"/> -<wire x1="368.3" y1="83.82" x2="375.92" y2="83.82" width="0.1524" layer="91"/> -<junction x="368.3" y="78.74"/> -<pinref part="U3" gate="A" pin="HO"/> +<wire x1="373.38" y1="78.74" x2="337.82" y2="78.74" width="0.1524" layer="91"/> +<pinref part="U$6" gate="G$1" pin="TGUP"/> +<pinref part="U$6" gate="G$1" pin="TGDN"/> +<wire x1="337.82" y1="78.74" x2="337.82" y2="76.2" width="0.1524" layer="91"/> +<junction x="337.82" y="78.74"/> </segment> </net> <net name="CHARGE" class="2"> <segment> -<pinref part="U3" gate="A" pin="HI"/> -<wire x1="302.26" y1="78.74" x2="279.4" y2="78.74" width="0.1524" layer="91"/> +<wire x1="312.42" y1="78.74" x2="279.4" y2="78.74" width="0.1524" layer="91"/> <label x="276.86" y="78.74" size="1.778" layer="95"/> <pinref part="J13" gate="G$1" pin="1"/> <wire x1="279.4" y1="78.74" x2="276.86" y2="78.74" width="0.1524" layer="91"/> <junction x="279.4" y="78.74"/> +<pinref part="U$6" gate="G$1" pin="INP"/> </segment> <segment> <pinref part="IC1" gate="G$1" pin="PC6/RXD1/MISO"/> @@ -19155,19 +19246,18 @@ You are welcome to use this library for commercial purposes. For attribution, we <label x="86.36" y="246.38" size="1.778" layer="95"/> </segment> <segment> -<pinref part="R4" gate="G$1" pin="1"/> <pinref part="C4" gate=">NAME" pin="1"/> -<wire x1="309.88" y1="93.98" x2="294.64" y2="93.98" width="0.1524" layer="91"/> +<wire x1="304.8" y1="93.98" x2="294.64" y2="93.98" width="0.1524" layer="91"/> <wire x1="294.64" y1="93.98" x2="294.64" y2="81.28" width="0.1524" layer="91"/> -<pinref part="U3" gate="A" pin="VDD"/> -<wire x1="294.64" y1="81.28" x2="299.72" y2="81.28" width="0.1524" layer="91"/> -<junction x="294.64" y="81.28"/> -<wire x1="299.72" y1="81.28" x2="302.26" y2="81.28" width="0.1524" layer="91"/> <wire x1="294.64" y1="93.98" x2="289.56" y2="93.98" width="0.1524" layer="91"/> <junction x="294.64" y="93.98"/> <label x="289.56" y="93.98" size="1.778" layer="95"/> -<pinref part="C23" gate=">NAME" pin="1"/> -<junction x="299.72" y="81.28"/> +<pinref part="U$6" gate="G$1" pin="VCC"/> +<wire x1="312.42" y1="86.36" x2="304.8" y2="86.36" width="0.1524" layer="91"/> +<wire x1="304.8" y1="86.36" x2="304.8" y2="93.98" width="0.1524" layer="91"/> +<junction x="304.8" y="93.98"/> +<pinref part="D2" gate="G$1" pin="A"/> +<wire x1="304.8" y1="93.98" x2="330.2" y2="93.98" width="0.1524" layer="91"/> </segment> <segment> <pinref part="U2" gate="A" pin="VDD"/> @@ -19655,16 +19745,16 @@ You are welcome to use this library for commercial purposes. For attribution, we </segment> <segment> <pinref part="C4" gate=">NAME" pin="2"/> -<pinref part="U3" gate="A" pin="VSS"/> -<wire x1="294.64" y1="73.66" x2="299.72" y2="73.66" width="0.1524" layer="91"/> <pinref part="GND8" gate="1" pin="GNDA"/> +<pinref part="U$6" gate="G$1" pin="GND"/> +<wire x1="312.42" y1="81.28" x2="307.34" y2="81.28" width="0.1524" layer="91"/> +<wire x1="307.34" y1="81.28" x2="307.34" y2="76.2" width="0.1524" layer="91"/> +<wire x1="307.34" y1="76.2" x2="307.34" y2="73.66" width="0.1524" layer="91"/> +<wire x1="307.34" y1="73.66" x2="294.64" y2="73.66" width="0.1524" layer="91"/> <junction x="294.64" y="73.66"/> -<pinref part="U3" gate="A" pin="LI"/> -<wire x1="299.72" y1="73.66" x2="302.26" y2="73.66" width="0.1524" layer="91"/> -<wire x1="302.26" y1="76.2" x2="302.26" y2="73.66" width="0.1524" layer="91"/> -<junction x="302.26" y="73.66"/> -<pinref part="C23" gate=">NAME" pin="2"/> -<junction x="299.72" y="73.66"/> +<pinref part="U$6" gate="G$1" pin="OVLO"/> +<wire x1="312.42" y1="76.2" x2="307.34" y2="76.2" width="0.1524" layer="91"/> +<junction x="307.34" y="76.2"/> </segment> </net> <net name="VIN" class="0"> @@ -19768,6 +19858,17 @@ You are welcome to use this library for commercial purposes. For attribution, we <label x="205.74" y="22.86" size="1.778" layer="95"/> </segment> </net> +<net name="N$1" class="2"> +<segment> +<pinref part="U$6" gate="G$1" pin="BST"/> +<pinref part="C3" gate=">NAME" pin="1"/> +<wire x1="337.82" y1="83.82" x2="345.44" y2="83.82" width="0.1524" layer="91"/> +<pinref part="D2" gate="G$1" pin="C"/> +<wire x1="335.28" y1="93.98" x2="345.44" y2="93.98" width="0.1524" layer="91"/> +<wire x1="345.44" y1="93.98" x2="345.44" y2="83.82" width="0.1524" layer="91"/> +<junction x="345.44" y="83.82"/> +</segment> +</net> </nets> </sheet> </sheets> diff --git a/electronics/pulseGenerator_v2.top.png b/electronics/pulseGenerator_v2.top.png new file mode 100644 index 0000000000000000000000000000000000000000..280d6083c096a52e0ee34261bb60e8ca36406291 Binary files /dev/null and b/electronics/pulseGenerator_v2.top.png differ diff --git a/electronics/pulseGenerator_v2.vias.png b/electronics/pulseGenerator_v2.vias.png new file mode 100644 index 0000000000000000000000000000000000000000..2323c91f3dfd9bd4e2381917e447c555c2f2a1b6 Binary files /dev/null and b/electronics/pulseGenerator_v2.vias.png differ diff --git a/electronics/pulseGenerator_v2_layers.pdf b/electronics/pulseGenerator_v2_layers.pdf new file mode 100644 index 0000000000000000000000000000000000000000..308242860467598c7f12e8086a0f7fc82024dc57 Binary files /dev/null and b/electronics/pulseGenerator_v2_layers.pdf differ diff --git a/electronics/readme.md b/electronics/readme.md index 4da6c349c858eda65bc2d2f2386d257d37ef4989..2eeec65d864c8bbb1d0e8b78727c78fba4ddc942 100644 --- a/electronics/readme.md +++ b/electronics/readme.md @@ -35,14 +35,19 @@ My understanding of the waveform: - Hearty N-Type MOSFETs: [IRFP460A](https://www.digikey.com/product-detail/en/vishay-siliconix/IRFP460APBF/IRFP460APBF-ND/811589) [FDB20N50F](https://www.digikey.com/product-detail/en/on-semiconductor/FDB20N50F/FDB20N50FCT-ND/4806461) [**SDB45N40**](https://www.digikey.com/product-detail/en/stmicroelectronics/STB45N40DM2AG/497-16133-2-ND/5724375) (least R_dson) -- High-side gate drivers: [**LM5107**](http://www.ti.com/lit/ds/symlink/lm5107.pdf) [UCC27200A](https://www.digikey.com/product-detail/en/texas-instruments/UCC27201ADDAR/296-28428-1-ND/2638108) - - I could get away with just using one of these (and using a low-side mosfet to do the discharge control). The problem with this is that then the workpiece and worktable are at high voltages whenever the machine is on. So I suspect I'll go with two... +- High-side gate drivers: ~~[**LM5107**](http://www.ti.com/lit/ds/symlink/lm5107.pdf) [UCC27200A](https://www.digikey.com/product-detail/en/texas-instruments/UCC27201ADDAR/296-28428-1-ND/2638108)~~ + - ~~I could get away with just using one of these (and using a low-side mosfet to do the discharge control). The problem with this is that then the workpiece and worktable are at high voltages whenever the machine is on. So I suspect I'll go with two…~~ + - It turns out that these don't have integrated charge pumps and so don't work unless the source of the FET is routinely grounded. + - The [LTC7001](http://cds.linear.com/docs/en/datasheet/7001fb.pdf) seems like a good option to replace these + - [diode for fast recovery](https://www.centralsemi.com/get_document.php?cmp=1&mergetype=pd&mergepath=pd&pdf_id=CMPD3003-A-C-S_R1.PDF) may be useful for high frequency operation - Capacitor: [6.8uF conductive polymer](https://www.digikey.com/scripts/DkSearch/dksus.dll?Detail&itemSeq=254554510&uq=636564567701952216) - [3.3V switching regulator](http://ww1.microchip.com/downloads/en/DeviceDoc/20005004D.pdf) - [relevant reference designs](http://www.microchip.com/wwwproducts/en/en554058) - window comparator - http://www.ti.com/lit/ug/tidub01/tidub01.pdf - just need 1 x (4x) https://www.digikey.com/product-detail/en/texas-instruments/TLV1704AIPWR/296-38432-1-ND/5015597 +- Current sense amplifier: [LTC6101](https://www.digikey.com/scripts/DkSearch/dksus.dll?Detail&itemSeq=256226194&uq=636578288769750671) + - Sense resistor: [4mOhm, 3W](https://www.digikey.com/scripts/DkSearch/dksus.dll?Detail&itemSeq=256226703&uq=636578288769750671) ### Timing Calculations @@ -88,6 +93,10 @@ Connecting those two regions, is the sensing and control circuitry. This region </div> +### The Assembled Board: + +<img src="images/soldered_board.jpg" width="700px"> + ### Errata - need to tie unused low input pins of the gate drivers to ground (should be easy to bridge) @@ -99,3 +108,75 @@ Connecting those two regions, is the sensing and control circuitry. This region - should have pull downs on both inputs to gate drivers and inputs to mosfets (for safety) - unclear if I need higher powe-rated resistors for the gate drive resistor. [They'll be undergoing high momentary currents but their average power dissipation is well below their 1/4W rating.](calculations.ipynb) + +### Gate Driver Replacement: LTC7001 + +It turns out that I picked a gate driver that didn't have an internal charge pump and so relied on the source of the high-side MOSFETs being routinely grounded in order to establish charge on the bootstrap capacitor. My work to discovere this is here now: [Debugging Gate Driver](debugging_gate_driver.md) + +Anyway, I picked a new gate driver with an integrated charge pump (see parts list above). + +In order to test this out without sending out for an entirely new board, I will redesign the board and then crop and mill pcbs to replace the small sections that are different than before. This should let me desolder the present boards and lay these new components right on top. + +from the [datasheet](http://cds.linear.com/docs/en/datasheet/7001fb.pdf) I should: + + - Use a bootstrap capacitor of at least 0.56uF ($\frac{10 Q_g}{1\text{V}}$) (let's start with 1uF) + - Use an external diode for faster recovery. + - Include space for gate resistor (although the pull-down and pull-up FET's in the gate driver have 1ohm and 2.2ohm R_dson respectively). + + +Here's what the board section looks like. The circuit doesn't require much. There's two 1uF capacitors: one which serves as the boost capacitor and one simply acts as a bypass between Vcc and ground. A resistor in series with the gate will let me limit in-rush current. Two 1nF capacitors are pictured at the output as a simulated capacitive load. + +<img src="images/gate_driver_circuit.jpg" width="600px"> + +I tested the gate driving circuitry independently to verify that it was working as expected. Here it is taking the 2.5Vpp square wave from the AFG on my scope and boostin it up to 12Vpp (even with a 7V DC offset). The rise time for a 1nF load (with no series resistance) is about 12ns and is about 20ns for a 2nF load. I expect the gate of the MOSFET to be ~3nF so I should expect in the ballpark of 30ns rise time. + +<div align="center"> + +<img src="images/1khz_1nf.png" width="300px"><img src="images/1khz_2nf.png" width="300px"> + +<img src="images/1khz_7v_offset.png" width="500px"> + +</div> + +Once I integrated the gate-driver circuitry to the main pulse generator board, I found that the board was not bootstrapping the voltage. At one point I was also getting no output from the discharge gate driver and so I suspect I fried it. I replaced it and the charge gate driver and added a 10ohm resistor in series with the gate to limit the inrush current. So far, I this seems to have helped. + +<div align="center"><img src="images/discharge_pulses_boosting.png" width="300px"><img src="images/charge_pulses_not_boosting.png" width="300px"></div> + +To try to debug the bootstrapping voltage, I replaced the 1uF bootstrap capacitor with a 33uF one (rated for 25V). This slowed the decay of the output voltage but it still ultimately stopped working after a few seconds. This led me to suspect I was operating at too high of a frequency. By decreasing frequency I was able to stabilize the voltage. It's stable at 488Hz, but not at 3.9KHz (there's no in-between with the way the counters are currently setup). At this frequency, it it able to be PWM'd down to 6/1024 (0.5%) while maintaining 12V across gate (and it's very unlikely I'll need duty cycles below that). + +This 500Hz is normally limited, I believe, by the current (30uA) the integrated charge pump uses to refill the boostrap capacitor. With a gate charge of 56nC, 30uA equates to 535Hz. Theoretically, an external diode is supposed to help for switches at higher frequencies than this. When TS is less than 12V, it's clear that the diode greatly reduces the time BST takes to get to 12V. But when TS is consistenly above 12V, it seems like D1 would always be reversed biased and wouldn't contribute to the time it takes to refill the capacitor. From the [datasheet](http://www.analog.com/media/en/technical-documentation/data-sheets/7001fb.pdf)... + +<img src="images/external_diode.png" width="400px"> + +So, it's unclear to me if I'd be able to get above this ~500Hz limit with the integrated charge pump. An alternative solution could be to build my own [dedicated external charge pump](http://www.ti.com/lit/an/slva444/slva444.pdf). + +Moving on… With both gate drivers working, I tested pulse output with a 10ohm load (a through-hole resistor placed between the output and ground). The pulses look good: + +<img src="images/10ohm_output_pulses.png" width="400px"> + +I then replaced the resistor with a spark gap. For testing I'm just using a bullet connector as the workpiece and the lead of a through-hole resistor as the tool. I initially tried having the workpiece grounded and the tool hot, but found it was much more favorable the other way. I would like to know more about the theory behind this. I guess part of it must be that the electrons (or ions?) are moving from ground to hot and so the workpiece should be hot….? + +<img src="images/pulse_generator_test_setup2.png" width="500px"> + +Here's what the pulses look like when they're making sparks: + +<img src="images/burning_output_pulses.png" width="350px"> <img src="images/burning_output_pulses2.png" width="350px"> + +I'm using a 20V source with a current limit of 500mA (although the circuit is not drawing more than ~60mA even when short circuiting). The pulses look more or less like I'd expect. The blue trace is connected directly to the hot end of the pulse output and the yellow is connected to the voltage divider spanning the spark capacitor bank. The pulses start at the full 20V, then once the sparking starts, it drops to ~10V in the picture on the right. The capacitor then starts discharging at a rate controlled by the RC constant (R_gap and C_spark, which is currently 6.8uF). When the workpiece gets too close to the tool, it short circuits and the spark capacitor's voltage drops all the way to zero. + +It's nice to see that the voltage divider output of the spark capacitors gives a good indication of how the cut is going. It maps exactly (100:1) with the shape of the output waveform. The negative transient as the pulse is stopped is something that I might want to pay attention to as something that could potentially damage the ADC. + +Here's what the sparking looks like: + + + +#### next steps: + +- figure out how to increase frequency +- try higher power (test 2x 50V supply) + - put it in the case for >50V +- start working on control: + - sample VC (with ADC) in realtime and see how clear a signal I get (at 500Hz, I'd expect it to be pretty good with ~2Msps) + - start with just having this give an output to tell me to turn the adjustment screw or not + - make a stepper motor board and connect the two together + - or… just use the tabletop instron... \ No newline at end of file diff --git a/electronics/video/first_burn_crop_converted.mp4 b/electronics/video/first_burn_crop_converted.mp4 new file mode 100644 index 0000000000000000000000000000000000000000..7c363917e253093ba39e6ffc462deb2e369762b8 Binary files /dev/null and b/electronics/video/first_burn_crop_converted.mp4 differ diff --git a/firmware/adc/hello_adc.c b/firmware/adc/hello_adc.c index e59e5081b411ab1647adb7957840c190510cdd31..9823332e6f9135a73dad02b444822ddb35ff3ced 100644 --- a/firmware/adc/hello_adc.c +++ b/firmware/adc/hello_adc.c @@ -144,7 +144,8 @@ int main(void) { // ADC_BandgapReference_Enable(&ADCA); //1V bandgap by default ADC_Reference_Config(&ADCA, ADC_REFSEL_INTVCC_gc); //_delay_ms(200); - ADC_Prescaler_Config(&ADCA, ADC_PRESCALER_DIV32_gc); + // ADC_Prescaler_Config(&ADCA, ADC_PRESCALER_DIV32_gc); + ADC_Prescaler_Config(&ADCA, ADC_PRESCALER_DIV1_gc); //speed test // ADC_Ch_InputMode_and_Gain_Config(&ADCA.CH0, // ADC_CH_INPUTMODE_DIFFWGAINL_gc, // ADC_CH_GAIN_16X_gc); diff --git a/firmware/adc/hello_adc.c.hex b/firmware/adc/hello_adc.c.hex deleted file mode 100644 index 8f514bbf613b527bd838036cdbcb3fffe1f35053..0000000000000000000000000000000000000000 --- a/firmware/adc/hello_adc.c.hex +++ /dev/null @@ -1,232 +0,0 @@ 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a/firmware/blink/hello.128a4u.blink.out and /dev/null differ diff --git a/firmware/pulseGen/pulseGen_AWEX.c b/firmware/pulseGen/pulseGen_AWEX.c index a93afb2ec8e9f0bf04ca3a032e52e0e558075334..37f9c4c6befc5da9be38165f2ee5ae6bfe8e4316 100644 --- a/firmware/pulseGen/pulseGen_AWEX.c +++ b/firmware/pulseGen/pulseGen_AWEX.c @@ -27,7 +27,7 @@ static char input_buffer[maxBufferSize+1] = {0}; int position_in_buffer = 0; uint16_t last_tx_rtc = 0; int counter = 0; -int inc = 1; +int inc = 4; USART_data_t USART_data; @@ -105,9 +105,9 @@ int main(void) { serialPort.DIRSET = txPin; //tx serialPort.DIRCLR = rxPin; //rx chargePort.DIRSET = chPin | dchPin; // charge and discharge - chargePort.PIN6CTRL |= PORT_OPC_PULLDOWN_gc; //turn on pull-down resistors (when in input mode) - chargePort.PIN7CTRL |= PORT_OPC_PULLDOWN_gc; //turn on pull-down resistors (when in input mode) - chargePort.REMAP |= PORT_TC0D_bm | PORT_TC0C_bm;//0b00001100; // remap OCOC and OCOD to our charge and discharge pins + // chargePort.PIN6CTRL |= PORT_OPC_PULLDOWN_gc; //turn on pull-down resistors (when in input mode) + // chargePort.PIN7CTRL |= PORT_OPC_PULLDOWN_gc; //turn on pull-down resistors (when in input mode) + // chargePort.REMAP |= PORT_TC0D_bm | PORT_TC0C_bm;//0b00001100; // remap OCOC and OCOD to our charge and discharge pins // setup USART USART_InterruptDriver_Initialize(&USART_data, &USARTC0, USART_DREINTLVL_LO_gc); @@ -121,14 +121,14 @@ int main(void) { // setup pwm - TCC0.PER = 0x0400; //set up 4096 resolution + TCC0.PER = 0x0400; //set up 1024 resolution TCC0.CTRLB |= TC_WGMODE_SS_gc;//( TCC0.CTRLB & ~TC0_WGMODE_gm ) | TC_WGMODE_SS_gc; //single slope TCC0.CTRLB |= TC0_CCDEN_bm; //& ( TC0_CCAEN_bm | TC0_CCBEN_bm | TC0_CCCEN_bm | TC0_CCDEN_bm ); //enable compare channel - TCC0.CTRLA |= TC_CLKSEL_DIV2_gc; //set clock divider + TCC0.CTRLA |= TC_CLKSEL_DIV64_gc; //set clock divider set_pwm(900); // setup AWEX - AWEXC.CTRL |= AWEX_DTICCDEN_bm; // enable on D channel (PC6 and PC7) and get CC from A + AWEXC.CTRL |= AWEX_DTICCDEN_bm; // enable on D channel (PC6 and PC7) AWEXC.STATUS &= ~AWEX_FDF_bm; // clear fault detection flag AWEXC.OUTOVEN |= chPin | dchPin; // enable output overide on charge and discharge pins AWEXC.DTBOTH = 32; // set deadtime (measured in clock cyles) @@ -138,21 +138,47 @@ int main(void) { sei(); while (1) { - if (RTC.CNT - last_tx_rtc > 10){ - writeToBuffer(&output_buffer[0],"count=%d\n", counter++); - send_packet(output_buffer,maxBufferSize); - last_tx_rtc = RTC.CNT; - set_pwm(counter+=inc); - if (counter > 1023) { - inc = - inc; - } else if (counter < 0) { - inc = -inc; - } - } - if (RTC.CNT > 5000) { - ledPort.OUTSET = ledPin; - chargePort.DIRCLR = chPin | dchPin; - } + // chargePort.OUTSET = chPin; + // chargePort.OUTSET = dchPin; + // _delay_ms(5); + // chargePort.OUTSET = chPin; + // chargePort.OUTCLR = dchPin; + // _delay_ms(5); + // chargePort.OUTCLR = chPin; + // chargePort.OUTSET = dchPin; + // _delay_ms(5); + // chargePort.OUTCLR = chPin; + // chargePort.OUTCLR = dchPin; + // _delay_ms(5); + + // chargePort.OUTSET = chPin; + // _delay_ms(5); + // chargePort.OUTCLR = chPin; + // _delay_ms(1); + // chargePort.OUTSET = dchPin; + // _delay_ms(5); + // chargePort.OUTCLR = dchPin; + // _delay_ms(1); + // if (RTC.CNT - last_tx_rtc > 25){ + // chargePort.OUTSET = chPin; + // chargePort.OUTCLR = dchPin; + // ledPort.OUTSET = ledPin; + // // chargePort.OUTTGL = dchPin; + // // ledPort.OUTTGL = ledPin; + // // writeToBuffer(&output_buffer[0],"count=%d\n", counter); + // // send_packet(output_buffer,maxBufferSize); + // last_tx_rtc = RTC.CNT; + // // set_pwm(counter+=inc); + // // if (counter > 1022) { + // // inc = - inc; + // // } else if (counter < 1) { + // // inc = -inc; + // // } + // } + // if (RTC.CNT > 5000) { + // ledPort.OUTSET = ledPin; + // chargePort.DIRCLR = chPin | dchPin; + // } } } diff --git a/firmware/pulseGen/pulseGen_AWEX.c.hex b/firmware/pulseGen/pulseGen_AWEX.c.hex deleted file mode 100644 index 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b/firmware/pulseGen/pulseGen_AWEX.out deleted file mode 100755 index a235576ba388692268e35f8df84efa40cf60f55b..0000000000000000000000000000000000000000 Binary files a/firmware/pulseGen/pulseGen_AWEX.out and /dev/null differ diff --git a/firmware/readme.md b/firmware/readme.md index ce8de3f3f2f009ac896ac3c2e27d9d87da19a3bf..0bd332980bcde4b9bc72ac96911ba9b478ade3e4 100644 --- a/firmware/readme.md +++ b/firmware/readme.md @@ -209,6 +209,6 @@ I applied a 0->500mV sinusoid (generated with my scope's AFG). Clearly 0V doesn' -According to the [ADC application note](http://ww1.microchip.com/downloads/en/AppNotes/00002535A.pdf), I need to manually measure the offset by ground my ADC pin and taking a number of measurements and then subtract this value from all future measurements. +According to the [ADC application note](http://ww1.microchip.com/downloads/en/AppNotes/00002535A.pdf), I need to manually measure the offset by grounding the ADC pin and taking a number of measurements and then subtract this value from all future measurements. Next step is to test the maximum frequency I can get reasonable measurements at. \ No newline at end of file diff --git a/firmware/usart/bare_usart_x128a4u.c.hex b/firmware/usart/bare_usart_x128a4u.c.hex deleted file mode 100644 index fdf962847f3c2d8e7b6dc573d4f1cc043284e706..0000000000000000000000000000000000000000 --- a/firmware/usart/bare_usart_x128a4u.c.hex +++ /dev/null @@ -1,47 +0,0 @@ -:100000000C94FE000C940E010C940E010C940E0145 -:100010000C940E010C940E010C940E010C940E0124 -:100020000C940E010C940E010C940E010C940E0114 -:100030000C940E010C940E010C940E010C940E0104 -:100040000C940E010C940E010C940E010C940E01F4 -:100050000C940E010C940E010C940E010C940E01E4 -:100060000C940E010C940E010C940E010C940E01D4 -:100070000C940E010C940E010C940E010C940E01C4 -:100080000C940E010C940E010C940E010C940E01B4 -:100090000C940E010C940E010C940E010C940E01A4 -:1000A0000C940E010C940E010C940E010C940E0194 -:1000B0000C940E010C940E010C940E010C940E0184 -:1000C0000C940E010C940E010C940E010C940E0174 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